公开(公告)号：US20160027863A1

公开(公告)日：2016-01-28

申请号：US14791114

申请日：2015-07-02

Applicant: Micron Technology, Inc.

Inventor： Brett W. Busch ,  Mingtao Li ,  Lequn Jennifer Liu ,  Kevin R. Shea ,  Belford T. Coursey ,  Jonathan T. Doebler

IPC: H01L49/02 ,  H01L23/525

CPC classification number: H01L28/40 ,  H01L23/5252 ,  H01L27/10852 ,  H01L27/10894 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming capacitors includes providing a support material over a substrate. The support material is at least one of semiconductive or conductive. Openings are formed into the support material. The openings include at least one of semiconductive or conductive sidewalls. An insulator is deposited along the semiconductive and/or conductive opening sidewalls. A pair of capacitor electrodes having capacitor dielectric there-between is formed within the respective openings laterally inward of the deposited insulator. One of the pair of capacitor electrodes within the respective openings is laterally adjacent the deposited insulator. Other aspects are disclosed, including integrated circuitry independent of method of manufacture.

Abstract translation: 形成电容器的方法包括在衬底上提供支撑材料。 支撑材料是半导体或导电中的至少一种。 开口形成支撑材料。 开口包括半导体或导电侧壁中的至少一个。 沿着半导体和/或导电开口侧壁沉积绝缘体。 一对电容器电极之间具有电容器电介质形成在相应的开口内横向向内沉积的绝缘体。 各个开口内的一对电容器电极之一横向邻近沉积的绝缘体。 公开了其它方面，包括独立于制造方法的集成电路。

公开(公告)号：US11417661B2

公开(公告)日：2022-08-16

申请号：US16805802

申请日：2020-03-01

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Matthew N. Rocklein ,  Brett W. Busch

IPC: H01L27/108 ,  H01L49/02

Abstract: Some embodiments include an integrated capacitor assembly having a conductive pillar supported by a base, with the conductive pillar being included within a first electrode of a capacitor. The conductive pillar has a first upper surface. A dielectric liner is along an outer surface of the conductive pillar and has a second upper surface. A conductive liner is along the dielectric liner and is included within a second electrode of the capacitor. The conductive liner has a third upper surface. One of the first and third upper surfaces is above the other of the first and third upper surfaces. The second upper surface is at least as high above the base as said one of the first and third upper surfaces. Some embodiments include memory arrays having capacitors with pillar-type first electrodes.

公开(公告)号：US10177152B1

公开(公告)日：2019-01-08

申请号：US15656999

申请日：2017-07-21

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Matthew N. Rocklein ,  Brett W. Busch

IPC: H01L27/108 ,  H01L49/02

Abstract: Some embodiments include an integrated capacitor assembly having a conductive pillar supported by a base, with the conductive pillar being included within a first electrode of a capacitor. The conductive pillar has a first upper surface. A dielectric liner is along an outer surface of the conductive pillar and has a second upper surface. A conductive liner is along the dielectric liner and is included within a second electrode of the capacitor. The conductive liner has a third upper surface. One of the first and third upper surfaces is above the other of the first and third upper surfaces. The second upper surface is at least as high above the base as said one of the first and third upper surfaces. Some embodiments include memory arrays having capacitors with pillar-type first electrodes.

公开(公告)号：US20190027478A1

公开(公告)日：2019-01-24

申请号：US16003571

申请日：2018-06-08

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Matthew N. Rocklein ,  Brett W. Busch

IPC: H01L27/108 ,  H01L49/02

CPC classification number: H01L27/10817 ,  H01L27/10814 ,  H01L27/10852 ,  H01L28/90

Abstract: Some embodiments include an integrated capacitor assembly having a conductive pillar supported by a base, with the conductive pillar being included within a first electrode of a capacitor. The conductive pillar has a first upper surface. A dielectric liner is along an outer surface of the conductive pillar and has a second upper surface. A conductive liner is along the dielectric liner and is included within a second electrode of the capacitor. The conductive liner has a third upper surface. One of the first and third upper surfaces is above the other of the first and third upper surfaces. The second upper surface is at least as high above the base as said one of the first and third upper surfaces. Some embodiments include memory arrays having capacitors with pillar-type first electrodes.

公开(公告)号：US10600788B2

公开(公告)日：2020-03-24

申请号：US16003571

申请日：2018-06-08

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Matthew N. Rocklein ,  Brett W. Busch

IPC: H01L27/108 ,  H01L49/02

Abstract: Some embodiments include an integrated capacitor assembly having a conductive pillar supported by a base, with the conductive pillar being included within a first electrode of a capacitor. The conductive pillar has a first upper surface. A dielectric liner is along an outer surface of the conductive pillar and has a second upper surface. A conductive liner is along the dielectric liner and is included within a second electrode of the capacitor. The conductive liner has a third upper surface. One of the first and third upper surfaces is above the other of the first and third upper surfaces. The second upper surface is at least as high above the base as said one of the first and third upper surfaces. Some embodiments include memory arrays having capacitors with pillar-type first electrodes.