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公开(公告)号：US12211571B2
公开(公告)日：2025-01-28
申请号：US17065462
申请日：2020-10-07
Applicant: Micron Technology, Inc.
Inventor： David W. Overgaard , Andrew P. Lyle , Glen E. Hush , Timothy P. Finkbeiner , Kristopher J. Kopel , Jonathan D. Harms
Abstract: Methods, systems, and devices for on-die testing for a memory device are described. In some examples, a memory die may include processing circuitry configured to perform evaluations of the memory die based on commands or instructions received from an external device. The processing circuitry may be configured to detect failures of the memory die and transmit related indications to the external device based on the on-die detection. In some examples, the processing circuitry may be configured to communicate failure information at a finer granularity than information associated with expected or nominal behavior. Additionally or alternatively, the processing circuitry may be configured to perform operations according to an internally-generated clock signal that operates at a faster rate or speed than a clock signal from the external device. In some examples, the processing circuitry may include an analog-to-digital conversion capability for digital communication of analog characteristics internal to the memory die.
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公开(公告)号：US20220108761A1
公开(公告)日：2022-04-07
申请号：US17065462
申请日：2020-10-07
Applicant: Micron Technology, Inc.
Inventor： David W. Overgaard , Andrew P. Lyle , Glen E. Hush , Timothy P. Finkbeiner , Kristopher J. Kopel , Jonathan D. Harms
Abstract: Methods, systems, and devices for on-die testing for a memory device are described. In some examples, a memory die may include processing circuitry configured to perform evaluations of the memory die based on commands or instructions received from an external device. The processing circuitry may be configured to detect failures of the memory die and transmit related indications to the external device based on the on-die detection. In some examples, the processing circuitry may be configured to communicate failure information at a finer granularity than information associated with expected or nominal behavior. Additionally or alternatively, the processing circuitry may be configured to perform operations according to an internally-generated clock signal that operates at a faster rate or speed than a clock signal from the external device. In some examples, the processing circuitry may include an analog-to-digital conversion capability for digital communication of analog characteristics internal to the memory die.
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