公开(公告)号：US12073113B2

公开(公告)日：2024-08-27

申请号：US17461469

申请日：2021-08-30

Applicant: Micron Technology, Inc.

Inventor： Lalla Fatima Drissi ,  Doriana Tardio ,  Giuseppe D'Eliseo ,  Giuseppe Ferrari

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: Methods, systems, and devices for memory operations are described. A memory system may write data to sequential physical addresses of the memory system based on receiving multiple write commands, where the sequential physical addresses may be associated with sequential logical addresses. Based on writing the data, the memory system may receive a read command for data stored in the memory system, where the read command may include a logical address. The memory system may determine a physical address of the memory system where the data is stored based on the received logical address, a last logical address written at the memory system, and a sequence number group associated with the last logical address. Based on determining the physical address, the memory system may read the data stored at the physical address.

公开(公告)号：US20230068324A1

公开(公告)日：2023-03-02

申请号：US17461469

申请日：2021-08-30

Applicant: Micron Technology, Inc.

Inventor： Lalla Fatima Drissi ,  Doriana Tardio ,  Giuseppe D'Eliseo ,  Giuseppe Ferrari

IPC: G06F3/06

Abstract: Methods, systems, and devices for memory operations are described. A memory system may write data to sequential physical addresses of the memory system based on receiving multiple write commands, where the sequential physical addresses may be associated with sequential logical addresses. Based on writing the data, the memory system may receive a read command for data stored in the memory system, where the read command may include a logical address. The memory system may determine a physical address of the memory system where the data is stored based on the received logical address, a last logical address written at the memory system, and a sequence number group associated with the last logical address. Based on determining the physical address, the memory system may read the data stored at the physical address.

公开(公告)号：US20250028484A1

公开(公告)日：2025-01-23

申请号：US18781572

申请日：2024-07-23

Applicant: Micron Technology, Inc.

Inventor： Lalla Fatima Drissi ,  Doriana Tardio ,  Giuseppe D'Eliseo ,  Giuseppe Ferrari

IPC: G06F3/06

Abstract: Methods, systems, and devices for memory operations are described. A memory system may write data to sequential physical addresses of the memory system based on receiving multiple write commands, where the sequential physical addresses may be associated with sequential logical addresses. Based on writing the data, the memory system may receive a read command for data stored in the memory system, where the read command may include a logical address. The memory system may determine a physical address of the memory system where the data is stored based on the received logical address, a last logical address written at the memory system, and a sequence number group associated with the last logical address. Based on determining the physical address, the memory system may read the data stored at the physical address.