公开(公告)号：US20240329867A1

公开(公告)日：2024-10-03

申请号：US18584993

申请日：2024-02-22

Applicant: Micron Technology, Inc.

Inventor： Yee Yang Tay ,  Lei Zhang ,  Steve Kientz ,  Edric Goh

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0629 ,  G06F3/0679

Abstract: Methods, apparatuses and systems related to tracking charge loss are described. An apparatus may include a tracking mechanism configured to make direct measurements for tracking charge loss in first-type cells. The apparatus may be configured to designate a set of the first-type cells as proxy for modeling charge loss at second-type cells having a different storage density than the first-type cells. The apparatus may use the tracking mechanism to make measurements on the proxy set of the first-type cells and translate the measurement to account for the charge loss at the second-type cells.

公开(公告)号：US20240412787A1

公开(公告)日：2024-12-12

申请号：US18733377

申请日：2024-06-04

Applicant: Micron Technology, Inc.

Inventor： Edric Goh ,  Dheeraj Srinivasan

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/34

Abstract: A memory device can include a memory array including a plurality of memory cells coupled to a control logic. The control logic is to initiate a program operation on one or more memory cells of a first segment of the memory array, wherein the program operation comprises a first calibration phase. The control logic can also read a first stored value corresponding to a first voltage applied during a second calibration phase for a second segment of the memory array, the second calibration phase before the first calibration phase. The control logic can further read a second stored value corresponding to an offset value associated with the first voltage. Additionally, the control logic can determine a second voltage for application during the calibration phase responsive to reading the first stored value and the second stored value.