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公开(公告)号：US20160172847A1
公开(公告)日：2016-06-16
申请号：US15050238
申请日：2016-02-22
发明人： James Davis , Michael Chaine
IPC分类号： H02H9/04
CPC分类号： H02H9/041 , H01L27/0262 , H02H9/046
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor, The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
摘要翻译： 公开了用于保护电路免受静电放电事件的电路，集成电路，装置和方法。 示例性装置包括耦合到节点并被配置为限制电压和放电与节点处的过电压事件相关联的电流的晶闸管。 所述过电压事件包括具有超过所述晶闸管的触发电压的幅度的负电压。所述示例性装置还包括耦合到所述晶闸管并被配置为调整所述触发电压的大小的晶体管。
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公开(公告)号：US11901727B2
公开(公告)日：2024-02-13
申请号：US17525707
申请日：2021-11-12
发明人： James Davis , Michael Chaine
CPC分类号： H02H9/041 , H01L27/0262 , H02H9/046
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
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公开(公告)号：US11183837B2
公开(公告)日：2021-11-23
申请号：US16223352
申请日：2018-12-18
发明人： James Davis , Michael Chaine
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
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公开(公告)号：US20190148934A1
公开(公告)日：2019-05-16
申请号：US16223352
申请日：2018-12-18
发明人： James Davis , Michael Chaine
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
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公开(公告)号：US10193334B2
公开(公告)日：2019-01-29
申请号：US15050238
申请日：2016-02-22
发明人： James Davis , Michael Chaine
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
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公开(公告)号：US09281682B2
公开(公告)日：2016-03-08
申请号：US13795425
申请日：2013-03-12
发明人： James Davis , Michael Chaine
CPC分类号： H02H9/041 , H01L27/0262 , H02H9/046
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
摘要翻译： 公开了用于保护电路免受静电放电事件的电路，集成电路，装置和方法。 示例性装置包括耦合到节点并被配置为限制电压和放电与节点处的过电压事件相关联的电流的晶闸管。 过电压事件包括具有超过晶闸管的触发电压的幅度的负电压。 该示例设备还包括耦合到晶闸管并被配置为调整触发电压的幅度的晶体管。
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公开(公告)号：US20220069572A1
公开(公告)日：2022-03-03
申请号：US17525707
申请日：2021-11-12
发明人： James Davis , Michael Chaine
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
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公开(公告)号：US20140268438A1
公开(公告)日：2014-09-18
申请号：US13795425
申请日：2013-03-12
发明人： James Davis , Michael Chaine
IPC分类号： H02H3/20
CPC分类号： H02H9/041 , H01L27/0262 , H02H9/046
摘要： Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. An example apparatus comprises a thyristor coupled to a node and configured to limit the voltage and discharge the current associated with an over-voltage event at the node. The over-voltage event includes a negative voltage having a magnitude that exceeds a trigger voltage of the thyristor. The example apparatus further comprising a transistor coupled to the thyristor and configured to adjust the magnitude of the trigger voltage.
摘要翻译： 公开了用于保护电路免受静电放电事件的电路，集成电路，装置和方法。 示例性装置包括耦合到节点并被配置为限制电压和放电与节点处的过电压事件相关联的电流的晶闸管。 过电压事件包括具有超过晶闸管的触发电压的幅度的负电压。 该示例设备还包括耦合到晶闸管并被配置为调整触发电压的幅度的晶体管。
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