公开(公告)号：US20240292607A1

公开(公告)日：2024-08-29

申请号：US18583319

申请日：2024-02-21

Applicant: Micron Technology, Inc.

Inventor： Jun Ho Lee ,  Byung Yoon Kim ,  Sangmin Hwang

IPC: H10B12/00

CPC classification number: H10B12/488 ,  H10B12/02

Abstract: A variety of applications can include an apparatus having a device including line contacts to closely-spaced conductive signal lines structured such that a sufficient margin for shorts between a signal line and a line contact to a directly adjacent signal line is maintained even with a misalignment of the line contact. In an embodiment, formation of a memory device can include forming a line contact on and contacting an access line for an array of memory cells, using a two stage removal procedure of different removal processes. The two stage removal procedure can include removing a portion of processing layers above an insulating protective layer positioned on the access line and selectively removing the insulating protective layer, exposing a portion of the access line, without removing material of the access line. The line contact can be formed on and contacting the top exposed portion of the access line.