公开(公告)号：US20240069756A1

公开(公告)日：2024-02-29

申请号：US17894343

申请日：2022-08-24

Applicant: Micron Technology, Inc.

Inventor： Michael Burk

IPC: G06F3/06

CPC classification number: G06F3/0623 ,  G06F3/0644 ,  G06F3/0679

Abstract: The present disclosure includes apparatuses, methods, and systems for partitioning system data from user data in memory. In an example, a method can include receiving system data at a memory, assigning the system data a first address within a first range of memory addresses, storing the system data in a first portion of the memory operated with a first set of trim settings in response to the system data having the first address within the first range of memory addresses, receiving user data, assigning the user data a second address within a second range of memory addresses, and storing the user data in a second portion of the memory operated with a second set of trim settings in response to the user having the second address within the second range of addresses.

公开(公告)号：US20250138734A1

公开(公告)日：2025-05-01

申请号：US19010977

申请日：2025-01-06

Applicant: Micron Technology, Inc.

Inventor： Michael Burk

IPC: G06F3/06

Abstract: The present disclosure includes apparatuses, methods, and systems for partitioning system data from user data in memory. In an example, a method can include receiving system data at a memory, assigning the system data a first address within a first range of memory addresses, storing the system data in a first portion of the memory operated with a first set of trim settings in response to the system data having the first address within the first range of memory addresses, receiving user data, assigning the user data a second address within a second range of memory addresses, and storing the user data in a second portion of the memory operated with a second set of trim settings in response to the user having the second address within the second range of addresses.

公开(公告)号：US20240078192A1

公开(公告)日：2024-03-07

申请号：US17939672

申请日：2022-09-07

Applicant: Micron Technology, Inc.

Inventor： Michael Burk ,  Lance Dover

IPC: G06F12/14

CPC classification number: G06F12/1458 ,  G06F12/1408 ,  G06F12/1441

Abstract: Systems, apparatuses, and methods related to isolating virtual machines in a memory device are described. A memory apparatus includes a memory device and a controller coupled to the memory device, wherein the controller is configured to provide a plurality of Peripheral Component Interconnect express (PCIe) functions of the memory device and isolate access to each of the plurality of PCIe functions via respective passwords and digital signatures created from host keys.

公开(公告)号：US12189967B2

公开(公告)日：2025-01-07

申请号：US17894343

申请日：2022-08-24

Applicant: Micron Technology, Inc.

Inventor： Michael Burk

IPC: G06F3/06

Abstract: The present disclosure includes apparatuses, methods, and systems for partitioning system data from user data in memory. In an example, a method can include receiving system data at a memory, assigning the system data a first address within a first range of memory addresses, storing the system data in a first portion of the memory operated with a first set of trim settings in response to the system data having the first address within the first range of memory addresses, receiving user data, assigning the user data a second address within a second range of memory addresses, and storing the user data in a second portion of the memory operated with a second set of trim settings in response to the user having the second address within the second range of addresses.

公开(公告)号：US12026102B2

公开(公告)日：2024-07-02

申请号：US17939672

申请日：2022-09-07

Applicant: Micron Technology, Inc.

Inventor： Michael Burk ,  Lance Dover

IPC: G06F12/14

CPC classification number: G06F12/1458 ,  G06F12/1408 ,  G06F12/1441

Abstract: Systems, apparatuses, and methods related to isolating virtual machines in a memory device are described. A memory apparatus includes a memory device and a controller coupled to the memory device, wherein the controller is configured to provide a plurality of Peripheral Component Interconnect express (PCIe) functions of the memory device and isolate access to each of the plurality of PCIe functions via respective passwords and digital signatures created from host keys.