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公开(公告)号:US20220276808A1
公开(公告)日:2022-09-01
申请号:US17747477
申请日:2022-05-18
Applicant: Micron Technology, Inc.
Inventor: Angelo Della Monica , Eric Kwok Fung Yuen , Pasquale Cimmino , Massimo Iaculo , Francesco Falanga
IPC: G06F3/06
Abstract: A variety of applications can include apparatus and/or methods of operating the apparatus in which functionalities of a memory device of the apparatus can be extended by changing data flow behaviour associated with standard commands used between a host platform and the memory device. Such functionalities can include debug capabilities. In an embodiment, a standard write command and data using a standard protocol to write to a memory device is received in the memory device, where the data is setup information to enable an extension component in the memory device. An extension component includes instructions in the memory device to execute operations on components of the memory device. The memory device can execute operations of the enabled extension component in the memory device based on the setup information. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US11340836B2
公开(公告)日:2022-05-24
申请号:US16990864
申请日:2020-08-11
Applicant: Micron Technology, Inc.
Inventor: Angelo Della Monica , Eric Kwok Fung Yuen , Pasquale Cimmino , Massimo Iaculo , Francesco Falanga
IPC: G06F3/06
Abstract: A variety of applications can include apparatus and/or methods of operating the apparatus in which functionalities of a memory device of the apparatus can be extended by changing data flow behaviour associated with standard commands used between a host platform and the memory device. Such functionalities can include debug capabilities. In an embodiment, a standard write command and data using a standard protocol to write to a memory device is received in the memory device, where the data is setup information to enable an extension component in the memory device. An extension component includes instructions in the memory device to execute operations on components of the memory device. The memory device can execute operations of the enabled extension component in the memory device based on the setup information. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US20200371719A1
公开(公告)日:2020-11-26
申请号:US16990864
申请日:2020-08-11
Applicant: Micron Technology, Inc.
Inventor: Angelo Della Monica , Eric Kwok Fung Yuen , Pasquale Cimmino , Massimo Iaculo , Francesco Falanga
IPC: G06F3/06
Abstract: A variety of applications can include apparatus and/or methods of operating the apparatus in which functionalities of a memory device of the apparatus can be extended by changing data flow behaviour associated with standard commands used between a host platform and the memory device. Such functionalities can include debug capabilities. In an embodiment, a standard write command and data using a standard protocol to write to a memory device is received in the memory device, where the data is setup information to enable an extension component in the memory device. An extension component includes instructions in the memory device to execute operations on components of the memory device. The memory device can execute operations of the enabled extension component in the memory device based on the setup information. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US20210374061A1
公开(公告)日:2021-12-02
申请号:US16883769
申请日:2020-05-26
Applicant: Micron Technology, Inc.
Inventor: Crescenzo Attanasio , Massimo Iaculo , Pasquale Cimmino , Nicola Cavaliere , Francesco Falanga
IPC: G06F12/0875 , G06F9/30
Abstract: Methods, systems, and devices for an enhanced instruction caching scheme are described. A memory controller may include a first closely-coupled memory component that is associated with storing data and control information and a second closely-coupled memory component that is associated with storing control information. The memory controller may be configured to retrieve data from the first memory closely-coupled component and control information from a second closely-coupled memory component. Control information may be stored in the first closely-coupled memory component, and a memory controller may access the control information stored in the first closely-coupled memory component by transferring, from the first closely-coupled memory component, the control information into the second closely-coupled memory component. After transferring the control information into the second closely-coupled memory component, the memory controller may access the control information from the second closely-coupled memory component.
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公开(公告)号:US20190121575A1
公开(公告)日:2019-04-25
申请号:US15790690
申请日:2017-10-23
Applicant: Micron Technology, Inc.
Inventor: Angelo Della Monica , Eric Kwok Fung Yuen , Pasquale Cimmino , Massimo Iaculo , Francesco Falanga
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0632 , G06F3/0644 , G06F3/0679
Abstract: A variety of applications can include apparatus and/or methods of operating the apparatus in which functionalities of a memory device of the apparatus can be extended by changing data flow behaviour associated with standard commands used between a host platform and the memory device. Such functionalities can include debug capabilities. In an embodiment, a standard write command and data using a standard protocol to write to a memory device is received in the memory device, where the data is setup information to enable an extension component in the memory device. An extension component includes instructions in the memory device to execute operations on components of the memory device. The memory device can execute operations of the enabled extension component in the memory device based on the setup information. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US11789661B2
公开(公告)日:2023-10-17
申请号:US17747477
申请日:2022-05-18
Applicant: Micron Technology, Inc.
Inventor: Angelo Della Monica , Eric Kwok Fung Yuen , Pasquale Cimmino , Massimo Iaculo , Francesco Falanga
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0632 , G06F3/0644 , G06F3/0679
Abstract: A variety of applications can include apparatus and/or methods of operating the apparatus in which functionalities of a memory device of the apparatus can be extended by changing data flow behaviour associated with standard commands used between a host platform and the memory device. Such functionalities can include debug capabilities. In an embodiment, a standard write command and data using a standard protocol to write to a memory device is received in the memory device, where the data is setup information to enable an extension component in the memory device. An extension component includes instructions in the memory device to execute operations on components of the memory device. The memory device can execute operations of the enabled extension component in the memory device based on the setup information. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US11586547B2
公开(公告)日:2023-02-21
申请号:US16883769
申请日:2020-05-26
Applicant: Micron Technology, Inc.
Inventor: Crescenzo Attanasio , Massimo Iaculo , Pasquale Cimmino , Nicola Cavaliere , Francesco Falanga
IPC: G06F12/00 , G06F12/0875 , G06F9/30
Abstract: Methods, systems, and devices for an enhanced instruction caching scheme are described. A memory controller may include a first closely-coupled memory component that is associated with storing data and control information and a second closely-coupled memory component that is associated with storing control information. The memory controller may be configured to retrieve data from the first memory closely-coupled component and control information from a second closely-coupled memory component. Control information may be stored in the first closely-coupled memory component, and a memory controller may access the control information stored in the first closely-coupled memory component by transferring, from the first closely-coupled memory component, the control information into the second closely-coupled memory component. After transferring the control information into the second closely-coupled memory component, the memory controller may access the control information from the second closely-coupled memory component.
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公开(公告)号:US10754580B2
公开(公告)日:2020-08-25
申请号:US15790690
申请日:2017-10-23
Applicant: Micron Technology, Inc.
Inventor: Angelo Della Monica , Eric Kwok Fung Yuen , Pasquale Cimmino , Massimo Iaculo , Francesco Falanga
IPC: G06F3/06
Abstract: A variety of applications can include apparatus and/or methods of operating the apparatus in which functionalities of a memory device of the apparatus can be extended by changing data flow behaviour associated with standard commands used between a host platform and the memory device. Such functionalities can include debug capabilities. In an embodiment, a standard write command and data using a standard protocol to write to a memory device is received in the memory device, where the data is setup information to enable an extension component in the memory device. An extension component includes instructions in the memory device to execute operations on components of the memory device. The memory device can execute operations of the enabled extension component in the memory device based on the setup information. Additional apparatus, systems, and methods are disclosed.
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