REPLACING DEFECTIVE MEMORY BLOCKS IN RESPONSE TO EXTERNAL ADDRESSES
    1.
    发明申请
    REPLACING DEFECTIVE MEMORY BLOCKS IN RESPONSE TO EXTERNAL ADDRESSES 有权
    对外部地址更换有缺陷的记忆块

    公开(公告)号:US20130250707A1

    公开(公告)日:2013-09-26

    申请号:US13894543

    申请日:2013-05-15

    CPC classification number: G11C29/04 G11C29/808 G11C29/82 G11C29/848

    Abstract: An apparatus has a controller. The controller is configured to address a non-defective memory block of a sequence of memory blocks in place of a defective memory block of the sequence of memory blocks such that the non-defective memory block replaces the defective memory block. The non-defective memory block is a proximate non-defective memory block following the defective memory block in the sequence of memory blocks that is available to replace the defective memory block. The controller is configured to apply a voltage-delay correction to the non-defective memory block that replaces the defective memory block based on the actual location of the non-defective memory block.

    Abstract translation: 装置具有控制器。 控制器被配置为代替存储器块序列的缺陷存储器块来寻址一系列存储器块的无缺陷存储器块,使得非缺陷存储器块替换有缺陷的存储器块。 无缺陷存储器块是跟随可用于替换有缺陷的存储器块的存储器块序列中的缺陷存储器块之后的邻近的无缺陷存储器块。 所述控制器被配置为基于所述无缺陷存储器块的实际位置对所述缺陷存储器块进行替换的所述非缺陷存储器块施加电压延迟校正。

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