公开(公告)号：US20220246220A1

公开(公告)日：2022-08-04

申请号：US17726351

申请日：2022-04-21

Applicant: Micron Technology, Inc.

Inventor： Marco Sforzin ,  Umberto Di Vincenszo ,  Daniele Balluchi

IPC: G11C16/30 ,  G11C16/04

Abstract: Methods, systems, and devices for operational modes for reduced power consumption in a memory system are described. A memory device may be coupled with a capacitor of a power management integrated circuit (PMIC). The memory device may operate in a first mode where a supply voltage is provided to the memory device from the PMIC. The memory device may operate in a second mode where it is isolated from the PMIC. When isolated, a node of the memory device (e.g., an internal node) may be discharged while the capacitor of the PMIC remains charged. When the memory device resumes operating in the first mode, a supply voltage may be provided to it based on the residual charge of the capacitor.