公开(公告)号：US20240192887A1

公开(公告)日：2024-06-13

申请号：US17758331

申请日：2022-03-17

Applicant: Micron Technology, Inc.

Inventor： Xiang Bai ,  Lingyun Wang

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0611 ,  G06F3/0688

Abstract: Methods, systems, and devices for techniques for efficiently handling misaligned sequential reads are described. A memory system may include a memory device that includes multiple memory dies. The memory system may receive a first read command and a second read command from a host system. The first read command may be associated with a first set of physical addresses and the second read command may be associated with a second set of physical addresses. The memory system may determine, based on the first set of physical addresses and the second set of physical addresses, that the first read command and the second read command are for a same memory die of the multiple memory dies. The memory system may then transmit to the memory die a read request that indicates the first set of physical addresses and the second set of physical addresses.