公开(公告)号：US12210447B2

公开(公告)日：2025-01-28

申请号：US17629306

申请日：2021-03-16

Applicant: Micron Technology, Inc.

Inventor： Bin Zhao ,  Lingyun Wang

IPC: G06F12/02

Abstract: Methods, systems, and devices for managing regions of a memory system are described. A memory system may include a non-volatile memory device and may receive a host performance booster (HPB) command (e.g., a read command) associated with one or more regions of the non-volatile memory device. The memory system may determine whether the region(s) associated with the HPB command are active. In instances where one or more of the associated regions are inactive, the memory system may activate the region(s) and deactivate one or more other regions based on a recency parameter (e.g., a timing parameter). The memory system may process the received HPB command based on the associated region(s) being active.

公开(公告)号：US20230367491A1

公开(公告)日：2023-11-16

申请号：US17628800

申请日：2021-03-16

Applicant: Micron Technology, Inc.

Inventor： Bin Zhao ,  Lingyun Wang

IPC: G06F3/06 ,  G06F12/1009

CPC classification number: G06F3/0625 ,  G06F3/0634 ,  G06F3/0679 ,  G06F12/1009

Abstract: Methods, systems, and devices for read operations for active regions of a memory device are described. A memory system that includes a non-volatile memory device may receive a command to enter a first power mode. Before entering the first power mode, the memory system may store an indication of the active regions of the non-volatile memory device that are active for use as part of a host performance booster (HPB) mode. The memory device may receive an HPB command while in the first power mode, and may subsequently enter (e.g., re-enter) the second power mode. In some examples, the HPB command may be processed based on its physical address being included in one of the active regions of the non-volatile memory device.

公开(公告)号：US12050786B2

公开(公告)日：2024-07-30

申请号：US17628800

申请日：2021-03-16

Applicant: Micron Technology, Inc.

Inventor： Bin Zhao ,  Lingyun Wang

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/1009

CPC classification number: G06F3/0625 ,  G06F3/0634 ,  G06F3/0679 ,  G06F12/1009

Abstract: Methods, systems, and devices for read operations for active regions of a memory device are described. A memory system that includes a non-volatile memory device may receive a command to enter a first power mode. Before entering the first power mode, the memory system may store an indication of the active regions of the non-volatile memory device that are active for use as part of a host performance booster (HPB) mode. The memory device may receive an HPB command while in the first power mode, and may subsequently enter (e.g., re-enter) the second power mode. In some examples, the HPB command may be processed based on its physical address being included in one of the active regions of the non-volatile memory device.

公开(公告)号：US20240192887A1

公开(公告)日：2024-06-13

申请号：US17758331

申请日：2022-03-17

Applicant: Micron Technology, Inc.

Inventor： Xiang Bai ,  Lingyun Wang

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0611 ,  G06F3/0688

Abstract: Methods, systems, and devices for techniques for efficiently handling misaligned sequential reads are described. A memory system may include a memory device that includes multiple memory dies. The memory system may receive a first read command and a second read command from a host system. The first read command may be associated with a first set of physical addresses and the second read command may be associated with a second set of physical addresses. The memory system may determine, based on the first set of physical addresses and the second set of physical addresses, that the first read command and the second read command are for a same memory die of the multiple memory dies. The memory system may then transmit to the memory die a read request that indicates the first set of physical addresses and the second set of physical addresses.

公开(公告)号：US20230367706A1

公开(公告)日：2023-11-16

申请号：US17629306

申请日：2021-03-16

Applicant: Micron Technology, Inc.

Inventor： Bin Zhao ,  Lingyun Wang

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201

Abstract: Methods, systems, and devices for managing regions of a memory system are described. A memory system may include a non-volatile memory device and may receive a host performance booster (HPB) command (e.g., a read command) associated with one or more regions of the non-volatile memory device. The memory system may determine whether the region(s) associated with the HPB command are active. In instances where one or more of the associated regions are inactive, the memory system may activate the region(s) and deactivate one or more other regions based on a recency parameter (e.g., a timing parameter). The memory system may process the received HPB command based on the associated region(s) being active.

公开(公告)号：US20230359538A1

公开(公告)日：2023-11-09

申请号：US17597985

申请日：2021-03-16

Applicant: Micron Technology, Inc.

Inventor： Bin Zhao ,  Lingyun Wang

IPC: G06F11/30 ,  G06F11/34 ,  G06F12/0871

CPC classification number: G06F11/3037 ,  G06F11/3409 ,  G06F12/0871 ,  G06F2212/7201

Abstract: Methods, systems, and devices for performance benchmark for host performance booster are described. The memory system may receive a plurality of read commands from a host system. The memory system may detect a pattern of random physical addresses as part of the plurality of read commands and increase an amount of space in a cache of the memory system based on the detected pattern. In some cases, the amount of space may be used for mapping between logical block addresses and physical addresses. The memory system may determine, for a different plurality of read commands, whether a rate of cache hits for a portion of the mapping satisfies a threshold. In some cases, the memory system may determine whether to activate a host performance booster mode based on determining whether the rate of cache hits satisfies the threshold.

公开(公告)号：US20250021245A1

公开(公告)日：2025-01-16

申请号：US18781613

申请日：2024-07-23

Applicant: Micron Technology, Inc.

Inventor： Bin Zhao ,  Lingyun Wang

IPC: G06F3/06 ,  G06F12/1009

Abstract: Methods, systems, and devices for read operations for active regions of a memory device are described. A memory system that includes a non-volatile memory device may receive a command to enter a first power mode. Before entering the first power mode, the memory system may store an indication of the active regions of the non-volatile memory device that are active for use as part of a host performance booster (HPB) mode. The memory device may receive an HPB command while in the first power mode, and may subsequently enter (e.g., re-enter) the second power mode. In some examples, the HPB command may be processed based on its physical address being included in one of the active regions of the non-volatile memory device.