公开(公告)号：US20240256444A1

公开(公告)日：2024-08-01

申请号：US18411940

申请日：2024-01-12

Applicant: Micron Technology, Inc.

Inventor： Zhongguang Xu ,  Guang Hu ,  Xianganfg Luo ,  Jung Sheng Hoei ,  Ting Luo ,  Zhenming Zhou ,  Jianmin Huang

IPC: G06F12/06

CPC classification number: G06F12/0607

Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to generate virtual or superblocks using multiple partial good blocks. The controller identifies a first partial good block (PGB) in a set of memory components, the first PGB having first subset of word line groups (WGRs) that are categorized as being non-defective. The controller searches for a second PGB in the set of memory components having a second subset of WGRs that are categorized as being non-defective. The controller computes a total quantity of WGRs based on the first quantity of WGRs in the first subset of WGRs and a second quantity of WGRs in the second subset of WGRs and, in response, combines the first PGB and the second PGB to form an individual virtual block.