Apparatuses and methods for reducing current leakage in a memory
    1.
    发明授权
    Apparatuses and methods for reducing current leakage in a memory 有权
    用于减少存储器中的电流泄漏的装置和方法

    公开(公告)号:US09076501B2

    公开(公告)日:2015-07-07

    申请号:US13970518

    申请日:2013-08-19

    Abstract: Apparatuses, sense amplifier circuits, and methods for operating a sense amplifier circuit in a memory are described. An example apparatus includes a sense amplifier circuit configured to be coupled to a digit line and configured to, during a memory access operation, drive the digit line to a voltage that indicates the logical value of the charge stored by a memory cell coupled to the digit line. During an initial time period of the memory access operation, the sense amplifier circuit is configured to drive the digit line to a first voltage that indicates the logical value of the charge stored by the memory cell. After the initial time period, the sense amplifier circuit is configured to drive the digit line to a second voltage different than the first voltage that indicates the logical value of the charge stored by the memory cell.

    Abstract translation: 描述了用于在存储器中操作读出放大器电路的装置,读出放大器电路和方法。 示例性装置包括读出放大器电路,其被配置为耦合到数字线并且被配置为在存储器访问操作期间将数字线驱动到指示由耦合到数字的存储器单元存储的电荷的逻辑值的电压 线。 在存储器访问操作的初始时间周期期间,读出放大器电路被配置为将数字线驱动到指示由存储器单元存储的电荷的逻辑值的第一电压。 在初始时间段之后,读出放大器电路被配置为将数字线驱动到不同于指示由存储器单元存储的电荷的逻辑值的第一电压的第二电压。

    APPARATUSES AND METHODS FOR REDUCING CURRENT LEAKAGE IN A MEMORY
    2.
    发明申请
    APPARATUSES AND METHODS FOR REDUCING CURRENT LEAKAGE IN A MEMORY 有权
    用于减少存储器中的电流泄漏的装置和方法

    公开(公告)号:US20150049565A1

    公开(公告)日:2015-02-19

    申请号:US13970518

    申请日:2013-08-19

    Abstract: Apparatuses, sense amplifier circuits, and methods for operating a sense amplifier circuit in a memory are described. An example apparatus includes a sense amplifier circuit configured to be coupled to a digit line and configured to, during a memory access operation, drive the digit line to a voltage that indicates the logical value of the charge stored by a memory cell coupled to the digit line. During an initial time period of the memory access operation, the sense amplifier circuit is configured to drive the digit line to a first voltage that indicates the logical value of the charge stored by the memory cell. After the initial time period, the sense amplifier circuit is configured to drive the digit line to a second voltage different than the first voltage that indicates the logical value of the charge stored by the memory cell.

    Abstract translation: 描述了用于在存储器中操作读出放大器电路的装置,读出放大器电路和方法。 示例性装置包括读出放大器电路,其被配置为耦合到数字线并且被配置为在存储器访问操作期间将数字线驱动到指示由耦合到数字的存储器单元存储的电荷的逻辑值的电压 线。 在存储器访问操作的初始时间周期期间,读出放大器电路被配置为将数字线驱动到指示由存储器单元存储的电荷的逻辑值的第一电压。 在初始时间段之后,读出放大器电路被配置为将数字线驱动到不同于指示由存储器单元存储的电荷的逻辑值的第一电压的第二电压。

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