公开(公告)号：US20240136399A1

公开(公告)日：2024-04-25

申请号：US18451819

申请日：2023-08-16

Applicant: Mitsubishi Electric Corporation

Inventor： Seiya SUGIMACHI ,  Kazufumi OKI ,  Okinori INOUE ,  Kazuhiro KAWAHARA ,  Kosuke YAMAGUCHI

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/78 ,  H02M7/5387

CPC classification number: H01L29/0696 ,  H01L29/0603 ,  H01L29/7393 ,  H01L29/7801 ,  H02M7/53875

Abstract: The object is to provide a technology that can shorten a routing length of a gate wire connecting a control IC that controls driving first and second semiconductor elements that are connected in parallel with each other, to a gate pad of one of the first and second semiconductor elements disposed distant from the control IC. A first semiconductor element and a second semiconductor element are disposed so that a long side of the first semiconductor element faces a side of the second semiconductor element, and a HVIC or a LVIC, the first semiconductor element, and the second semiconductor element are disposed in this order in a direction orthogonal to a first direction, the gate pad is disposed on the first semiconductor element on one side in the first direction, and the gate pad is disposed on the second semiconductor element on the other side in the first direction.

公开(公告)号：US20240234504A9

公开(公告)日：2024-07-11

申请号：US18451819

申请日：2023-08-17

Applicant: Mitsubishi Electric Corporation

Inventor： Seiya SUGIMACHI ,  Kazufumi OKI ,  Okinori INOUE ,  Kazuhiro KAWAHARA ,  Kosuke YAMAGUCHI

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/78 ,  H02M7/5387

CPC classification number: H01L29/0696 ,  H01L29/0603 ,  H01L29/7393 ,  H01L29/7801 ,  H02M7/53875

Abstract: The object is to provide a technology that can shorten a routing length of a gate wire connecting a control IC that controls driving first and second semiconductor elements that are connected in parallel with each other, to a gate pad of one of the first and second semiconductor elements disposed distant from the control IC. A first semiconductor element and a second semiconductor element are disposed so that a long side of the first semiconductor element faces a side of the second semiconductor element, and a HVIC or a LVIC, the first semiconductor element, and the second semiconductor element are disposed in this order in a direction orthogonal to a first direction, the gate pad is disposed on the first semiconductor element on one side in the first direction, and the gate pad is disposed on the second semiconductor element on the other side in the first direction.