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公开(公告)号:US20240264861A1
公开(公告)日:2024-08-08
申请号:US18619507
申请日:2024-03-28
申请人: Monica GUPTA , Prathviraj BILLAVA , Nachiket PATEL , Russell FENGER , Rajshree CHABUKSWAR , Stephen H. GUNTHER , Anusha RAMACHANDRAN
发明人: Monica GUPTA , Prathviraj BILLAVA , Nachiket PATEL , Russell FENGER , Rajshree CHABUKSWAR , Stephen H. GUNTHER , Anusha RAMACHANDRAN
IPC分类号: G06F9/48
CPC分类号: G06F9/485 , G06F9/4893
摘要: An apparatus, computer-implemented method, and system to schedule ready threads on a processor circuitry. T The apparatus includes memory circuitry, machine-readable instructions, and processor circuitry to determine a quality of a first thread of a set of threads that are ready for scheduling on the processor circuitry. Based on the quality of the first thread, the apparatus finds a set of modules of the processor circuitry that are available for scheduling. The apparatus further selects a preferred module of the set of modules for the first thread. The apparatus then schedules the first thread to run on the preferred module.