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公开(公告)号：US11290063B2
公开(公告)日：2022-03-29
申请号：US15931595
申请日：2020-05-14
发明人： Jun Xu , Xinwu Cai , Shunfang Wu , Shen Feng , Mingfu Shi , Taibo Dong
摘要： A low noise amplifier includes a preamplifier, first differential amplifiers, second differential amplifiers, a signal adder, and a load circuit. The preamplifier receives an input signal, and amplifies the input signal to generate a first signal. The input signal and the first signal have the same phase. The first differential amplifiers receive the first signal and a first reference signal and generate a first output differential signal pair. The second differential amplifiers receive the input signal and a second reference signal and generate a second output differential signal pair. The signal adder adds up the first output differential signal pair and the second output differential signal pair. The load circuit is coupled to the signal adder, and generates a third output differential signal pair according to the addition result.
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公开(公告)号：US11038478B2
公开(公告)日：2021-06-15
申请号：US15931552
申请日：2020-05-13
发明人： Shen Feng , Xinwu Cai , Shunfang Wu , Jun Xu , Mingfu Shi , Taibo Dong
摘要： A radio frequency (RF) signal transceiver is provided. The RF signal transceiver includes a first transformer, a signal transceiving processor, a signal receiving amplifier, and a signal transmitting amplifier. The first transformer is coupled to an antenna through a first end of a primary side, and two endpoints of a secondary side of the first transformer receive and transmit a pair of differential signals. The signal transceiving processor receives a pair of input differential signals from the secondary side of the first transformer and generates a pair of processed differential signals. The signal receiving amplifier is coupled to the signal transceiving processor and is configured to receive and amplify the pair of processed differential signals. The signal transmitting amplifier is coupled to the secondary side of the first transformer and provides a pair of transmission differential signals to the secondary side.
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3.发明授权公开(公告)号：US11075642B2
公开(公告)日：2021-07-27
申请号：US17134530
申请日：2020-12-28
发明人： Mingfu Shi , Shunfang Wu , Shen Feng , Jun Xu , Xinwu Cai , Taibo Dong
摘要： The present disclosure provides a linear calibration system for a time-to-digital converter and a method thereof, and a digital phase-locked loop. The linear calibration system includes a digitally controlled reference delay circuit for receiving a first clock signal and delaying the first clock signal to generate a reference clock signal, a time-to-digital conversion circuit including at least two time-to-digital converters, and a state machine. The time-to-digital conversion circuit receives the first clock signal and the reference clock signal, delays the first clock signal to generate a first delay signal, compares a phase of the first delay signal with a phase of the reference clock signal, and outputs a phase detection result signal. The state machine generates a delay control signal for controlling the digitally controlled reference delay circuit, adjusts a calibration control signal to align the phases of the first delay signal and the reference clock signal.
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