公开(公告)号：US20230274886A1

公开(公告)日：2023-08-31

申请号：US18108070

申请日：2023-02-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Akira ISHIZUKA ,  Shun SHIMASAKI

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/008 ,  H01G4/12 ,  H01G4/232

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/008 ,  H01G4/12 ,  H01G4/232

Abstract: A multilayer ceramic capacitor includes a multilayer body including first and second dielectric layers, two main surfaces, two lateral surfaces, two end surfaces, and an inner layer portion including first and second internal electrodes laminated alternately therein with one of the dielectric layers interposed therebetween, outer dielectric layer portions that sandwich the inner layer portion in a lamination direction, and side gap portions that sandwich the inner layer portion and the outer layer portions in a width direction. The multilayer body includes first and second external electrodes connected to the first and second internal electrodes, respectively. The first external electrode includes a main surface electrode portion on at least one of the two main surfaces, and a lateral surface electrode portion connected to at least one lateral surface side end portion of each of the first internal electrodes and is covered with one of the side gap portions.