公开(公告)号：US20230318546A1

公开(公告)日：2023-10-05

申请号：US18192802

申请日：2023-03-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yuuki TANAKA ,  Shohei IMAI

IPC: H03F3/21 ,  H03F1/02 ,  H03F1/56 ,  H03F3/45

CPC classification number: H03F3/211 ,  H03F1/0288 ,  H03F1/565 ,  H03F3/45475 ,  H03F2200/387 ,  H03F2200/451

Abstract: A combiner circuit includes: a combiner section that outputs a combined signal by combining a first signal output from a carrier amplifier circuit and a second signal output from a peak amplifier circuit, the first signal being generated by amplifying a first distribution signal distributed from an input signal, the second signal being generated by amplifying a second distribution signal distributed from the input signal; and a matching section connected in series with the combiner section to receive the combined signal, wherein a variation coefficient of an imaginary part of impedance associated with an increase in frequency of the input signal indicates a negative value, and the matching section matches impedance between the combiner section and a load.