-
公开(公告)号:US20130279590A1
公开(公告)日:2013-10-24
申请号:US13866486
申请日:2013-04-19
Applicant: NOVATEK MICROELECTRONICS CORP.
Inventor: Yen-Sung CHEN , Tsui-Chin Chen , Jian-De Jiang
IPC: H04N7/36
CPC classification number: H04N19/513 , H04N19/533 , H04N19/567 , H04N19/587
Abstract: An image processing circuit and an image processing method are provided. The image processing circuit comprises a full search engine and a frame rate conversion (FRC) engine. The full search engine executes a full search to generate a sum of sum of absolute difference (SAD) distribution according to the reference image and the current image. The FRC engine analyzes a scene characteristic from the current image according to SAD distribution. The FRC engine adjusts at least one of the control parameters according to the scene characteristic. The FRC engine generates an interpolated image according to the reference image, the current image and the control parameters.
Abstract translation: 提供了图像处理电路和图像处理方法。 图像处理电路包括全搜索引擎和帧速率转换(FRC)引擎。 全搜索引擎执行全搜索以根据参考图像和当前图像产生绝对差(SAD)分布之和的和。 FRC引擎根据SAD分布从当前图像分析场景特征。 FRC引擎根据场景特性调整至少一个控制参数。 FRC引擎根据参考图像,当前图像和控制参数生成内插图像。