公开(公告)号：US20150039928A1

公开(公告)日：2015-02-05

申请号：US14038751

申请日：2013-09-27

Applicant: Novatek Microelectronics Corp.

Inventor： Pao-Yen Lin

IPC: G06F1/10 ,  H04L9/08

CPC classification number: G06F1/10 ,  H04N21/43632

Abstract: A data processing method and apparatus are provided. The data processing apparatus includes a converter module and a control module. The converter module receives a clock signal through a pin, and decides a bit value of the first data according to a length of a corresponding period of the clock signal. The control module determines whether to perform a bit writing operation for writing the bit value into a memory according to the clock signal and the first data.

Abstract translation: 提供了一种数据处理方法和装置。 数据处理装置包括转换器模块和控制模块。 转换器模块通过引脚接收时钟信号，并根据时钟信号的相应周期的长度来决定第一数据的位值。 控制模块根据时钟信号和第一数据确定是否执行将位值写入存储器的位写入操作。

公开(公告)号：US09753485B2

公开(公告)日：2017-09-05

申请号：US14038751

申请日：2013-09-27

Applicant: Novatek Microelectronics Corp.

Inventor： Pao-Yen Lin

IPC: G06F1/04 ,  G06F1/12 ,  G06F5/06 ,  G06F1/10 ,  H04N21/4363

CPC classification number: G06F1/10 ,  H04N21/43632

Abstract: A data processing method and apparatus are provided. The data processing apparatus includes a converter module and a control module. The converter module receives a clock signal through a pin, and decides a bit value of the first data according to a length of a corresponding period of the clock signal. The control module determines whether to perform a bit writing operation for writing the bit value into a memory according to the clock signal and the first data.

公开(公告)号：US12125457B2

公开(公告)日：2024-10-22

申请号：US17539214

申请日：2021-12-01

Applicant: NOVATEK Microelectronics Corp.

Inventor： Wen-Chi Lin ,  Li-Wei Chen ,  Hsiang-Chih Chen ,  Pao-Yen Lin ,  Cheng-Wei Sung ,  Chung-Wen Hung

IPC: G09G5/00 ,  G09G5/12 ,  H04N21/4363

CPC classification number: G09G5/005 ,  G09G5/006 ,  G09G5/12 ,  H04N21/4363

Abstract: A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.

公开(公告)号：US20220180838A1

公开(公告)日：2022-06-09

申请号：US17539214

申请日：2021-12-01

Applicant: NOVATEK Microelectronics Corp.

Inventor： Wen-Chi Lin ,  Li-Wei Chen ,  Hsiang-Chih Chen ,  Pao-Yen Lin ,  Cheng-Wei Sung ,  Chung-Wen Hung

IPC: G09G5/00 ,  G09G5/12 ,  H04N21/4363

Abstract: A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.