公开(公告)号：US20230378972A1

公开(公告)日：2023-11-23

申请号：US18106470

申请日：2023-02-06

Applicant: NOVATEK Microelectronics Corp.

Inventor： Jin-Yi Lin ,  Jhih-Siou Cheng ,  Yung-Te Chang ,  Chih-Cheng Chen

IPC: H03M1/46 ,  H03M1/12 ,  H03M1/14

CPC classification number: H03M1/468 ,  H03M1/1245 ,  H03M1/462 ,  H03M1/145

Abstract: A sample and hold (S/H) circuit includes an analog-to-digital converter (ADC), a register and a digital-to-analog converter (DAC). The ADC receives an input signal and converts the input signal into a digital code. The register, coupled to the ADC, stores the digital code. The DAC, coupled to the register, converts the digital code into an output signal.