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公开(公告)号：US11694643B2
公开(公告)日：2023-07-04
申请号：US17337330
申请日：2021-06-02
Applicant: NVIDIA Corporation
Inventor： Jens Roever , Gerrit Ary Slavenburg , Robert Jan Schutten
CPC classification number: G09G3/3426 , G06T1/20 , G06V10/507 , G09G3/2096 , G09G3/36 , G09G2320/0266 , G09G2320/0626
Abstract: In various examples, a low-latency variable backlight liquid crystal display (LCD) system is disclosed. The LCD system may reduce latency and video lag by performing an analysis of peak pixel values within subsets of pixels using a rendering device, prior to transmitting the frame to a display device for display. As a result, the display device may receive the peak pixel value data prior to or concurrently with the frame data, and may begin updating the backlight settings of the display without having to wait for a substantial portion of the frame to be received. In this way, the LCD system may avoid the full frame delay of conventional systems, allowing the LCD system to more reliably support high-performance applications such as gaming.
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Patent Agency Ranking
2.发明授权公开(公告)号：US10607552B2
公开(公告)日：2020-03-31
申请号：US16152358
申请日：2018-10-04
Applicant: NVIDIA Corporation
Inventor： Jens Roever
Abstract: A display controller generates a backlight illumination field (BLIF) based on a coarse point-spread function (PSF) and a correction PSF. The display controller samples the coarse PSF to accumulate light contributions from a larger neighborhood of LEDs around a given LCD pixel. The display controller samples the correction PSF to generate correction factors for a smaller neighborhood of LEDs around the given LCD pixel. The display controller interpolates samples drawn from the coarse PSF and samples drawn from the correction PSF and then combines the interpolated samples to generate a full resolution BLIF.
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公开(公告)号：US11043172B2
公开(公告)日：2021-06-22
申请号：US16268438
申请日：2019-02-05
Applicant: NVIDIA CORPORATION
Inventor： Gerrit Ary Slavenburg , Robert Jan Schutten , Jens Roever , Tom J. Verbeure
Abstract: A display controller progressively updates LEDs and LCD pixels in scanline order as portions of an image are scanned into a frame buffer. The display controller analyzes a first portion of the image that includes a first pixel value associated with a first LCD pixel. The display controller identifies a first LED that contributes luminance to the first LCD pixel and determines an LED current setting for the LED based on the first pixel value. The display controller then identifies a second LCD pixel that resides above the first LED and is associated with a second pixel value. The display controller configures the second LCD pixel based on the second pixel value and luminance contributions received at the second LCD pixel. Accordingly, the display controller need not wait for the entire image to be scanned into the frame buffer before initiating display of the image.
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公开(公告)号：US10909903B2
公开(公告)日：2021-02-02
申请号：US16276564
申请日：2019-02-14
Applicant: NVIDIA CORPORATION
Inventor： Jens Roever , Robert Jan Schutten
Abstract: A display device includes a display controller that performs a high-throughput dithering operation. The display controller performs a quantization operation with pixel values generated by a graphics processor to generate quantized pixel values and residual error values. The display controller distributes the residual error values associated with a first group of quantized pixel values to a second group of quantized pixel values based on a set of distribution weights. A given distribution weight defines what fraction of a given residual error value is distributed to a given quantized pixel value included in the second group of quantized pixel values. The distribution weights are calibrated to permit the display controller to compute different fractions of residual error values using bit shifting logic instead of complex combinatorial logic.
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公开(公告)号：US20220392414A1
公开(公告)日：2022-12-08
申请号：US17337330
申请日：2021-06-02
Applicant: NVIDIA Corporation
Inventor： Jens Roever , Gerrit Ary Slavenburg , Robert Jan Schutten
Abstract: In various examples, a low-latency variable backlight liquid crystal display (LCD) system is disclosed. The LCD system may reduce latency and video lag by performing an analysis of peak pixel values within subsets of pixels using a rendering device, prior to transmitting the frame to a display device for display. As a result, the display device may receive the peak pixel value data prior to or concurrently with the frame data, and may begin updating the backlight settings of the display without having to wait for a substantial portion of the frame to be received. In this way, the LCD system may avoid the full frame delay of conventional systems, allowing the LCD system to more reliably support high-performance applications such as gaming.
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6.发明授权公开(公告)号：US11074871B2
公开(公告)日：2021-07-27
申请号：US16828850
申请日：2020-03-24
Applicant: NVIDIA CORPORATION
Inventor： Jens Roever
Abstract: A display controller generates a backlight illumination field (BLIF) based on a coarse point-spread function (PSF) and a correction PSF. The display controller samples the coarse PSF to accumulate light contributions from a larger neighborhood of LEDs around a given LCD pixel. The display controller samples the correction PSF to generate correction factors for a smaller neighborhood of LEDs around the given LCD pixel. The display controller interpolates samples drawn from the coarse PSF and samples drawn from the correction PSF and then combines the interpolated samples to generate a full resolution BLIF.
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