公开(公告)号：US20140214342A1

公开(公告)日：2014-07-31

申请号：US13754781

申请日：2013-01-30

Applicant: NVIDIA CORPORATION

Inventor： Gunaseelan Ponnuvel ,  Keith Michael Katcher ,  Tsung-Chi Eddy Yang ,  Nerinder Singh

IPC: G01R31/28

CPC classification number: H01L22/14 ,  H01L22/20

Abstract: A system, method, and computer program product are provided for verifying sensitivity test program stability. A sensitivity test program including a set of tests is run on a plurality of integrated circuit die fabricated on a silicon wafer, where each test in the set of tests specifies a different set of operating parameters for structures within each integrated circuit die. Results of the sensitivity test program are received for each integrated circuit die and the results of the sensitivity test program are stored in shadow bins allocated within a memory, where each shadow bin corresponds to a different test in the set of tests. The results may be used to verify and optimize operating voltage and operating frequency of different tests in the production test program and wafer fabrication process sensitivity.

Abstract translation: 提供了一种用于验证灵敏度测试程序稳定性的系统，方法和计算机程序产品。 包括一组测试的灵敏度测试程序在制造在硅晶片上的多个集成电路芯片上运行，其中该组测试中的每个测试为每个集成电路管芯内的结构规定了不同的一组操作参数。 针对每个集成电路管芯接收灵敏度测试程序的结果，并将灵敏度测试程序的结果存储在分配在存储器内的影子箱中，其中每个影子箱对应于该组测试中的不同测试。 结果可用于验证和优化生产测试程序和晶圆制造工艺灵敏度中不同测试的工作电压和工作频率。