专利检索 ap:("NVIDIA Corp.") AND inv:"Harbinder Sikka" 第 1 页

1.

发明申请
Deep Learning Testability Analysis with Graph Convolutional Networks 有权

公开(公告)号：US20200151288A1

公开(公告)日：2020-05-14

申请号：US16520688

申请日：2019-07-24

申请人： NVIDIA Corp.

发明人： Yuzhe Ma , Haoxing Ren , Brucek Khailany , Harbinder Sikka , Lijuan Luo , Karthikeyan Natarajan

IPC分类号： G06F17/50

摘要： Techniques to improve the accuracy and speed for detection and remediation of difficult to test nodes in a circuit design netlist. The techniques utilize improved netlist representations, test point insertion, and trained neural networks.

2.

发明申请
DEEP LEARNING BASED IDENTIFICATION OF DIFFICULT TO TEST NODES 有权

公开(公告)号：US20210295169A1

公开(公告)日：2021-09-23

申请号：US17231866

申请日：2021-04-15

申请人： NVIDIA Corp.

发明人： Harbinder Sikka , Kaushik Narayanun , Lijuan Luo , Karthikeyan Natarajan , Manjunatha Gowda , Sandeep Gangundi

IPC分类号： G06N3/08 , G06T1/20 , G06T11/20 , G06N3/04 , G06F30/323

摘要： Techniques to improve the accuracy and speed for detection and remediation of difficult to test nodes in a circuit design netlist. The techniques utilize improved netlist representations, test point insertion, and trained neural networks.

3.

发明授权
Deep learning testability analysis with graph convolutional networks 有权

公开(公告)号：US10657306B1

公开(公告)日：2020-05-19

申请号：US16520688

申请日：2019-07-24

申请人： NVIDIA Corp.

发明人： Yuzhe Ma , Haoxing Ren , Brucek Khailany , Harbinder Sikka , Lijuan Luo , Karthikeyan Natarajan

IPC分类号： G06F17/50 , G06F30/327 , G06F30/367 , G06F30/3323 , G06F30/323 , G06F30/398 , G06F30/3308

摘要： Techniques to improve the accuracy and speed for detection and remediation of difficult to test nodes in a circuit design netlist. The techniques utilize improved netlist representations, test point insertion, and trained neural networks.

4.

发明授权
Deep learning based identification of difficult to test nodes 有权

公开(公告)号：US11574097B2

公开(公告)日：2023-02-07

申请号：US17231866

申请日：2021-04-15

申请人： NVIDIA Corp.

发明人： Harbinder Sikka , Kaushik Narayanun , Lijuan Luo , Karthikeyan Natarajan , Manjunatha Gowda , Sandeep Gangundi

IPC分类号： G06F7/50 , G06F30/327 , G06N3/08 , G06N7/00 , G06K9/62 , G06N3/04

摘要： Techniques to improve the accuracy and speed for detection and remediation of difficult to test nodes in a circuit design netlist. The techniques utilize improved netlist representations, test point insertion, and trained neural networks.

5.

发明授权
Deep learning based identification of difficult to test nodes 有权

公开(公告)号：US11010516B2

公开(公告)日：2021-05-18

申请号：US16537376

申请日：2019-08-09

申请人： NVIDIA Corp.

发明人： Harbinder Sikka , Kaushik Narayanun , Lijuan Luo , Karthikeyan Natarajan , Manjunatha Gowda , Sandeep Gangundi

IPC分类号： G06F17/50 , G06F30/327 , G06N3/08 , G06N7/00 , G06K9/62 , G06N3/04

摘要： Techniques to improve the accuracy and speed for detection and remediation of difficult to test nodes in a circuit design netlist. The techniques utilize improved netlist representations, test point insertion, and trained neural networks.

6.

发明申请
DEEP LEARNING BASED IDENTIFICATION OF DIFFICULT TO TEST NODES 审中-公开

公开(公告)号：US20200151289A1

公开(公告)日：2020-05-14

申请号：US16537376

申请日：2019-08-09

申请人： NVIDIA Corp.

发明人： Harbinder Sikka , Kaushik Narayanun , Lijuan Luo , Karthikeyan Natarajan , Manjunatha Gowda , Sandeep Gangundi

IPC分类号： G06F17/50 , G06N3/08 , G06N3/04 , G06K9/62 , G06N7/00

摘要： Techniques to improve the accuracy and speed for detection and remediation of difficult to test nodes in a circuit design netlist. The techniques utilize improved netlist representations, test point insertion, and trained neural networks.