公开(公告)号：US20190377549A1

公开(公告)日：2019-12-12

申请号：US16001838

申请日：2018-06-06

Applicant: NVIDIA Corporation

Inventor： Jonah M. Alben ,  Paulius Micikevicius ,  Hao Wu ,  Ming Yiu Siu

IPC: G06F7/499

Abstract: A method, computer readable medium, and system are disclosed for rounding numerical values. A set of bits from an input value is identified as a rounding value. A second set of bits representing a second value is extracted from the input value and added with the rounding value to produce a sum. The sum is truncated to produce the rounded output value. Thus, the present invention provides a stochastic rounding technique that rounds up an input value as a function of a second value and a rounding value, both of which were obtained from the input value. When the second value and rounding value are obtained from consistent bit locations of the input value, the resulting output value is deterministic. Stochastic rounding, which is deterministic, is advantageously applicable in deep learning applications.

公开(公告)号：US09477482B2

公开(公告)日：2016-10-25

申请号：US14038672

申请日：2013-09-26

Applicant: NVIDIA Corporation

Inventor： Xiaogang Qiu ,  Ian Chi Yan Kwong ,  Ming Yiu Siu ,  Jack H. Choquette ,  Michael Alan Fetterman

IPC: G06F9/38 ,  G06F9/30 ,  G06F9/46

CPC classification number: G06F9/3887 ,  G06F9/3012 ,  G06F9/3826 ,  G06F9/3828 ,  G06F9/3851 ,  G06F9/3869 ,  G06F9/46

Abstract: A system, method, and computer program product are provided for implementing a multi-cycle register file bypass mechanism. The method includes the steps of receiving a set of control bits, combining the set of control bits with a set of valid bits associated with previously issued instructions, and enabling a bypass path for each thread based on the set of control bits and the set of valid bits. Each valid bit in the set of valid bits indicates whether execution of an instruction of the previously issued instructions was enabled for a thread in a thread block.

Abstract translation: 提供了一种用于实现多周期寄存器文件旁路机制的系统，方法和计算机程序产品。 该方法包括以下步骤：接收一组控制位，将该组控制位与先前发出的指令相关联的一组有效位组合，以及基于所述一组控制位和所述一组控制位对每个线程启用旁路路径 有效位。 有效位集合中的每个有效位指示是否为线程块中的线程执行先前发出的指令的指令。

公开(公告)号：US20210279055A1

公开(公告)日：2021-09-09

申请号：US16807834

申请日：2020-03-03

Applicant: NVIDIA Corporation

Inventor： Nirmal Saxena ,  Ming Yiu Siu ,  Justin Paul Luitjens

IPC: G06F9/30 ,  H04L9/06

Abstract: Apparatuses, systems, and techniques to perform bit matrix multiply and accumulate operations. In at least one embodiment, a Galois residue is determined in response to performing a bit matrix multiply and accumulate operation.

公开(公告)号：US10684824B2

公开(公告)日：2020-06-16

申请号：US16001838

申请日：2018-06-06

Applicant: NVIDIA Corporation

Inventor： Jonah M. Alben ,  Paulius Micikevicius ,  Hao Wu ,  Ming Yiu Siu

IPC: G06F7/499

Abstract: A method, computer readable medium, and system are disclosed for rounding numerical values. A set of bits from an input value is identified as a rounding value. A second set of bits representing a second value is extracted from the input value and added with the rounding value to produce a sum. The sum is truncated to produce the rounded output value. Thus, the present invention provides a stochastic rounding technique that rounds up an input value as a function of a second value and a rounding value, both of which were obtained from the input value. When the second value and rounding value are obtained from consistent bit locations of the input value, the resulting output value is deterministic. Stochastic rounding, which is deterministic, is advantageously applicable in deep learning applications.

公开(公告)号：US20150089202A1

公开(公告)日：2015-03-26

申请号：US14038672

申请日：2013-09-26

Applicant: NVIDIA Corporation

Inventor： Xiaogang Qiu ,  Ian Chi Yan Kwong ,  Ming Yiu Siu ,  Jack H. Choquette ,  Michael Alan Fetterman

IPC: G06F9/38

CPC classification number: G06F9/3887 ,  G06F9/3012 ,  G06F9/3826 ,  G06F9/3828 ,  G06F9/3851 ,  G06F9/3869 ,  G06F9/46

Abstract: A system, method, and computer program product are provided for implementing a multi-cycle register file bypass mechanism. The method includes the steps of receiving a set of control bits, combining the set of control bits with a set of valid bits associated with previously issued instructions, and enabling a bypass path for each thread based on the set of control bits and the set of valid bits. Each valid bit in the set of valid bits indicates whether execution of an instruction of the previously issued instructions was enabled for a thread in a thread block.

Abstract translation: 提供了一种用于实现多周期寄存器文件旁路机制的系统，方法和计算机程序产品。 该方法包括以下步骤：接收一组控制位，将该组控制位与先前发出的指令相关联的一组有效位组合，以及基于所述一组控制位和所述一组控制位对每个线程启用旁路路径 有效位。 有效位集合中的每个有效位指示是否为线程块中的线程执行先前发出的指令的指令。