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公开(公告)号:US20250104670A1
公开(公告)日:2025-03-27
申请号:US18373748
申请日:2023-09-27
Applicant: NVIDIA Corporation
IPC: G09G5/395
Abstract: Disclosed are apparatuses, systems, and techniques that reduce latency of frame processing pipelines. The techniques include but are not limited to causing a display to set a refresh rate that matches a frame rendering rate of an application and rendering, with the frame rendering rate, a plurality of frames. Rendering frames includes generating, using a first processing unit, sets of instructions associated with respective frames and generated starting at times spaced with the refresh rate, processing, using a second processing unit, the sets of instructions to render the frames, and causing the display to display the rendered frames.
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公开(公告)号:US20240342600A1
公开(公告)日:2024-10-17
申请号:US18529260
申请日:2023-12-05
Applicant: NVIDIA Corporation
Inventor: Sau Yan Keith LI , Ziad Ben Hadj Alouane , Seth Schneider , Viktor Grigoryevich Vandanov , Rouslan Lyubomirov Dimitrov
IPC: A63F13/52 , A63F13/355
CPC classification number: A63F13/52 , A63F13/355
Abstract: Disclosed are apparatuses, systems, and techniques that eliminate frame tears, reduce stutters, and minimize latency in frame rendering pipelines. The techniques include but are not limited to collecting one or more latency metrics associated with rendering of a first set of one or more frames using a graphics rendering pipeline operating according to a first frame-generation schedule. The techniques further include modifying, using the one or more latency metrics, a first frame-generation schedule to obtain a second frame-generation schedule. The techniques include, rendering using the graphics rendering pipeline operating according to the second frame-generation schedule, a second set of one or more frames, and causing the second set of frames to be displayed on a display device.
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