公开(公告)号：US20250139256A1

公开(公告)日：2025-05-01

申请号：US18495745

申请日：2023-10-26

Applicant: NVIDIA Corporation

Inventor： Smbat Tonoyan ,  Paul Lee Chou ,  Mark Alan Overby ,  James Jiayuan Zhang ,  Jay S. Huang ,  Aishwarya Senthilkumar ,  Mukul Singhal

IPC: G06F21/60

Abstract: An instruction to disable a first cryptographic key of a computing device is received by a processor of the device. The first cryptographic key is embedded in the device during manufacturing to facilitate a boot sequence of the device. The instruction is signed using a cryptographic signature. The first cryptographic key is associated with a first priority indicator. The cryptographic signature is verified using a second cryptographic key embedded in the device during manufacturing. The second cryptographic key is associated with a second priority indicator. The first priority indicator is compared with the second priority indicator. Responsive to determining that the second priority indicator supersedes the first priority indicator, the first cryptographic key is disabled.

公开(公告)号：US20250137211A1

公开(公告)日：2025-05-01

申请号：US18936113

申请日：2024-11-04

Applicant: NVIDIA CORPORATION

Inventor： Padmanabham Patki ,  Jue Wu ,  Andrew Elias ,  Smbat Tonoyan

IPC: E01F13/02 ,  G09F9/30

Abstract: Systems, computer program products, and methods are described herein for automated data retrieval from an integrated circuit (IC). An example system extracts, using a scan island (e.g., a partition of the IC that is isolated for data retrieval), data from a plurality of scan chains and a plurality of random-access memories (RAMs) associated with the IC in response to a trigger event associated with the IC; determines, using a data security module associated with the scan island, whether the one or more users are authorized to access the respective portions of the data; and transmits the one or more portions of the data to the one or more users upon verification of their authorization.

公开(公告)号：US20250123329A1

公开(公告)日：2025-04-17

申请号：US19003046

申请日：2024-12-27

Applicant: NVIDIA CORPORATION

Inventor： Padmanabham Patki ,  Jue Wu ,  Andrew Elias ,  Smbat Tonoyan

IPC: G01R31/3185 ,  G01R31/317

Abstract: A scan island for automated data retrieval from an integrated circuit (IC) includes a data extraction module configured to extract data from multiple scan chains and random-access memory (RAM) modules in response to a trigger event, storing the data in an external non-volatile storage medium. The scan island further comprises a clock and reset module, which includes a free-running independent clock to enable continuous operation of the scan island upon occurrence of the trigger event, and a local reset module that re-initializes the scan island in a known state following the trigger event without external intervention. The scan island operates as an isolated partition within the IC, ensuring secure and autonomous data retrieval and recovery processes.

公开(公告)号：US12277043B2

公开(公告)日：2025-04-15

申请号：US17828162

申请日：2022-05-31

Applicant: NVIDIA Corporation

Inventor： Smbat Tonoyan ,  Mahmut Yilmaz

IPC: G06F11/263 ,  G06F11/27

Abstract: A system can include a memory and a processing device, operatively coupled to the memory, to perform operations including receiving a header block of an ordered set of blocks. The header block includes a header block payload and a first digest. The operations further include authenticating, based on the header block payload, the header block, and receiving a first data block of the ordered set of blocks. The first data block includes a first data block payload and a second digest. The operations further include authenticating, based on the first digest, the first data block, and processing the first data block payload.

公开(公告)号：US12210770B1

公开(公告)日：2025-01-28

申请号：US18372773

申请日：2023-09-26

Applicant: NVIDIA CORPORATION

Inventor： Padmanabham Patki ,  Jue Wu ,  Andrew Elias ,  Smbat Tonoyan

IPC: G06F3/06

Abstract: Systems, computer program products, and methods are described herein for automated data retrieval from an integrated circuit (IC). An example system receives an alert indicating a trigger event associated with the IC; extracts, using a scan island (e.g., a partition of the IC that is isolated for data retrieval), data from a plurality of scan chains and a plurality of random-access memories (RAMs) associated with the IC in response to receiving the alert; stores the data in an external non-volatile storage media; and reboots the IC upon storing the data in the external non-volatile storage media. In this way, embodiments of the present invention offer a scalable and secure method for real-time data extraction and processing in the event of an integrated circuit malfunction, improving diagnostics while ensuring cost-effectiveness and data security.

公开(公告)号：US20230409452A1

公开(公告)日：2023-12-21

申请号：US17828162

申请日：2022-05-31

Applicant: NVIDIA Corporation

Inventor： Smbat Tonoyan ,  Mahmut Yilmaz

IPC: G06F11/263 ,  G06F11/27

CPC classification number: G06F11/263 ,  G06F11/27

Abstract: A system can include a memory and a processing device, operatively coupled to the memory, to perform operations including receiving a header block of an ordered set of blocks. The header block includes a header block payload and a first digest. The operations further include authenticating, based on the header block payload, the header block, and receiving a first data block of the ordered set of blocks. The first data block includes a first data block payload and a second digest. The operations further include authenticating, based on the first digest, the first data block, and processing the first data block payload.