公开(公告)号：US20190206018A1

公开(公告)日：2019-07-04

申请号：US15879377

申请日：2018-01-24

Applicant: NVIDIA Corporation

Inventor： Andrei Khodakovsky ,  Kirill A. Dmitriev ,  Rouslan L. Dimitrov ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/20 ,  G06T1/60 ,  G06T15/00

CPC classification number: G06T1/20 ,  G06T1/60 ,  G06T15/005 ,  G06T2200/24 ,  G06T2210/52

Abstract: One or more copy commands are scheduled for locating one or more pages of data in a local memory of a graphics processing unit (GPU) for more efficient access to the pages of data during rendering. A first processing unit that is coupled to a first GPU receives a notification that an access request count has reached a specified threshold. The first processing unit schedules a copy command to copy the first page of data to a first memory circuit of the first GPU from a second memory circuit of the second GPU. The copy command is included within a GPU command stream.

公开(公告)号：US10402937B2

公开(公告)日：2019-09-03

申请号：US15857330

申请日：2017-12-28

Applicant: NVIDIA Corporation

Inventor： Rouslan L. Dimitrov ,  Kirill A. Dmitriev ,  Andrei Khodakovsky ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/60 ,  G06T15/00 ,  G06F12/1009 ,  G06T1/20

Abstract: A method for rendering graphics frames allocates rendering work to multiple graphics processing units (GPUs) that are configured to allow access to pages of data stored in locally attached memory of a peer GPU. The method includes the steps of generating, by a first GPU coupled to a first memory circuit, one or more first memory access requests to render a first primitive for a first frame, where at least one of the first memory access requests targets a first page of data that physically resides within a second memory circuit coupled to a second GPU. The first GPU requests the first page of data through a first data link coupling the first GPU to the second GPU and a register circuit within the first GPU accumulates an access request count for the first page of data. The first GPU notifies a driver that the access request count has reached a specified threshold.

公开(公告)号：US10430915B2

公开(公告)日：2019-10-01

申请号：US15879377

申请日：2018-01-24

Applicant: NVIDIA Corporation

Inventor： Andrei Khodakovsky ,  Kirill A. Dmitriev ,  Rouslan L. Dimitrov ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/60 ,  G06T1/20 ,  G06T15/00

Abstract: One or more copy commands are scheduled for locating one or more pages of data in a local memory of a graphics processing unit (GPU) for more efficient access to the pages of data during rendering. A first processing unit that is coupled to a first GPU receives a notification that an access request count has reached a specified threshold. The first processing unit schedules a copy command to copy the first page of data to a first memory circuit of the first GPU from a second memory circuit of the second GPU. The copy command is included within a GPU command stream.

公开(公告)号：US20190206023A1

公开(公告)日：2019-07-04

申请号：US15857330

申请日：2017-12-28

Applicant: NVIDIA Corporation

Inventor： Rouslan L. Dimitrov ,  Kirill A. Dmitriev ,  Andrei Khodakovsky ,  Tzyywei Hwang ,  Wishwesh Anil Gandhi ,  Lacky Vasant Shah

IPC: G06T1/60 ,  G06T1/20 ,  G06F12/1009 ,  G06T15/00

CPC classification number: G06T1/60 ,  G06F9/44 ,  G06F12/1009 ,  G06T1/20 ,  G06T15/005

Abstract: A method for rendering graphics frames allocates rendering work to multiple graphics processing units (GPUs) that are configured to allow access to pages of data stored in locally attached memory of a peer GPU. The method includes the steps of generating, by a first GPU coupled to a first memory circuit, one or more first memory access requests to render a first primitive for a first frame, where at least one of the first memory access requests targets a first page of data that physically resides within a second memory circuit coupled to a second GPU. The first GPU requests the first page of data through a first data link coupling the first GPU to the second GPU and a register circuit within the first GPU accumulates an access request count for the first page of data. The first GPU notifies a driver that the access request count has reached a specified threshold.