公开(公告)号：US20240340201A1

公开(公告)日：2024-10-10

申请号：US18745229

申请日：2024-06-17

申请人： NVIDIA Corporation

发明人： Vishnu Balan ,  Viswanath Annampedu ,  Pervez Mirzra Aziz

IPC分类号： H04L25/03

CPC分类号： H04L25/03057

摘要： A receiver includes a partial response (PR) system that receives a received signal from a transmitter over a channel and equalize the received signal such that there is a controlled relationship between consecutive values of equalized received symbols and transmitted data transmitted by the transmitter. The receiver also includes a decision feed forward equalization (DFFE) system that receives partial response signals from the PR system and cancel at least one of pre-cursor intersymbol interference (ISI) or post-cursor ISI introduced by the channel.

公开(公告)号：US20230208686A1

公开(公告)日：2023-06-29

申请号：US18112401

申请日：2023-02-21

申请人： NVIDIA Corporation

发明人： Vishnu Balan ,  Viswanath Annampedu ,  Pervez Mirzra Aziz

IPC分类号： H04L25/03

CPC分类号： H04L25/03057

摘要： A receiver includes a decision feed forward equalization (DFFE) system that generates, based on a digital signal that includes at least one intersymbol interference (ISI) value introduced by a communication channel, a detected signal including a set of detected symbol values. The DFFE system cancels the at least one ISI value from the detected signal using the set of estimated transmitted symbols and a set of tap coefficients to obtain a compensated signal and a set of compensated symbol values.

公开(公告)号：US12057974B2

公开(公告)日：2024-08-06

申请号：US18112401

申请日：2023-02-21

申请人： NVIDIA Corporation

发明人： Vishnu Balan ,  Viswanath Annampedu ,  Pervez Mirzra Aziz

IPC分类号： H04L25/03

CPC分类号： H04L25/03057

摘要： A receiver includes a decision feed forward equalization (DFFE) system that generates, based on a digital signal that includes at least one intersymbol interference (ISI) value introduced by a communication channel, a detected signal including a set of detected symbol values. The DFFE system cancels the at least one ISI value from the detected signal using the set of estimated transmitted symbols and a set of tap coefficients to obtain a compensated signal and a set of compensated symbol values.

公开(公告)号：US11611458B1

公开(公告)日：2023-03-21

申请号：US17392178

申请日：2021-08-02

申请人： NVIDIA Corporation

发明人： Vishnu Balan ,  Viswanath Annampedu ,  Pervez Mirza Aziz

IPC分类号： H04L25/03

摘要： A receiver includes a decision feed forward equalization (DFFE) system coupled to a partial response (PR) system. The partial response system generates, based on a digital signal that includes pre-cursor intersymbol interference (ISI) and post-cursor ISI introduced by a communication channel, a detected signal including a set of detected symbol values. The detected signal is equalized to a partial response. The DFFE system includes a PR inverter to generate a set of estimated transmitted symbol values based on the set of detected symbol values and DFFE circuitry to cancel the pre-cursor ISI and the post-cursor ISI from the detected signal using the set of estimated transmitted symbols and a set of tap coefficients to obtain a compensated signal and a set of compensated symbol values.