公开(公告)号：US20220385179A1

公开(公告)日：2022-12-01

申请号：US17443972

申请日：2021-07-29

Applicant: NXP B.V.

Inventor： Dongyong Zhu ,  Bo Cai ,  XinDong Duan ,  Feng Cong ,  Jian Qing

IPC: H02M3/07 ,  H03K17/16 ,  H03K17/0812 ,  H02M1/08 ,  H02M3/158

Abstract: The disclosure relates to a switched capacitor converter with gate driving circuits for limiting currents provided by switching field effect transistors. Embodiments disclosed include a switched capacitor converter (100), SCC, comprising a plurality of gate driver circuits (101a-d, 200, 300) arranged to provide a gate voltage signal to a respective power FET (102a-d) in response to a respective input switching signal (sw1_in, sw2_in, sw3_in, sw4_in, IN), wherein each gate driver circuit (101a-d, 200, 300) comprises a first gate driver module (206) and a second gate driver module (207), the gate driver circuit (101a-d, 200, 300) configured to operate in: a first mode in which the first gate driver module (206) provides the gate voltage signal to a respective power FET (102a-d, 205) in response to an input switching signal (IN) at an input (203) of the first gate driver module (206) causing the gate voltage signal to switch between first and second voltage rails (201, 202) by operation of first and second switches (208, 209) connected between the pair of voltage rails (201, 202); and a second mode in which, in response to enabling of a current limit switching signal (climit_en), the first gate driver module disables switching of one of the first and second switches (208, 209) and the second gate driver module (207) operates to limit a current provided to the respective power FET (102a-d, 205).

公开(公告)号：US11736005B2

公开(公告)日：2023-08-22

申请号：US17443972

申请日：2021-07-29

Applicant: NXP B.V.

Inventor： Dongyong Zhu ,  Bo Cai ,  XinDong Duan ,  Feng Cong ,  Jian Qing

IPC: H02M3/07 ,  H02M1/08 ,  H02M3/158

CPC classification number: H02M3/07 ,  H02M1/08 ,  H02M3/158

Abstract: The disclosure relates to a switched capacitor converter (SCC) with gate driving circuits for limiting currents provided by switching field effect transistors. Embodiments disclosed include an SCC with gate driver curcuits providing gate voltage signals to power FETs, each gate driver circuit comprising first and second gate driver modules and configured to operate in: a first mode in which the first gate driver module provides a gate voltage signal to a power FET that switches between first and second voltage rails by operation of first and second switches connected between the pair of voltage rails; and a second mode in which, in reponse to enabling of a current limit switching signal, the first gate driver module disables switching of one of the first and second switches and the second gate driver module operates to limit a current provided to the power FET.