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公开(公告)号：US11736005B2
公开(公告)日：2023-08-22
申请号：US17443972
申请日：2021-07-29
Applicant: NXP B.V.
Inventor： Dongyong Zhu , Bo Cai , XinDong Duan , Feng Cong , Jian Qing
Abstract: The disclosure relates to a switched capacitor converter (SCC) with gate driving circuits for limiting currents provided by switching field effect transistors. Embodiments disclosed include an SCC with gate driver curcuits providing gate voltage signals to power FETs, each gate driver circuit comprising first and second gate driver modules and configured to operate in: a first mode in which the first gate driver module provides a gate voltage signal to a power FET that switches between first and second voltage rails by operation of first and second switches connected between the pair of voltage rails; and a second mode in which, in reponse to enabling of a current limit switching signal, the first gate driver module disables switching of one of the first and second switches and the second gate driver module operates to limit a current provided to the power FET.
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公开(公告)号：US20230006072A1
公开(公告)日：2023-01-05
申请号：US17807869
申请日：2022-06-21
Applicant: NXP B.V.
Inventor： Chao Chen , Zhouyi Luo , Feng Cong
Abstract: A MIS capacitor and a method of making the same. The capacitor includes a semiconductor substrate having a first part having a first conductivity type and contact regions for coupling the first part to an output node. The substrate has dielectric on a surface of the first part and electrodes on the dielectric. The substrate has a second part having a second conductivity type and a third part having the first conductivity type. The third part is coupleable to a supply voltage. The second part is located between the first part and the third part. The first part and the second part form a first p-n junction and the second part and the third part form a second p-n junction. A reference contact is provided for coupling the second part to a reference voltage. A further contact region is provided for coupling the second part to the output node.
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公开(公告)号：US11050417B2
公开(公告)日：2021-06-29
申请号：US15922922
申请日：2018-03-16
Applicant: NXP B.V.
Inventor： Dongyong Zhu , Feng Cong , FuChun Zhan
IPC: H02H9/04 , H03K17/082 , H03K5/24
Abstract: Gate-protection circuitry protects a transistor, such as a MOSFET, from large gate-to-source voltage differentials that can permanently damage the transistor's gate-oxide layer. A source-voltage detector selectively enables the gate-protection circuitry based on a source voltage of the transistor. The gate-protection circuit is implemented without any Zener diodes. The transistor may be a load switch that is selectively controlled to apply a supply voltage to a load.
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Patent Agency Ranking
公开(公告)号：US12205942B2
公开(公告)日：2025-01-21
申请号：US17374214
申请日：2021-07-13
Applicant: NXP B.V.
Inventor： Guido Wouter Willem Quax , Dongyong Zhu , Feng Cong , Tingting Pan
IPC: H01L27/02
Abstract: An integrated circuit includes two N wells from two different devices in close proximity to each other with each N well biased by two different terminals. The N wells are at least partially surrounded by P type regions that are biased by a terminal. The integrated circuit includes conductivity reduction features that increase the resistivity of current paths to a P type regions of one device on a side closest the other device. The integrated circuit includes two conductive tie biasing structures each located directly over an N type region of the substrate and directly over a P type region of the substrate. The two conductive tie biasing structures are not electrically connected to each other and are not electrically coupled to each other by a conductive biasing structure.
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公开(公告)号：US20190149144A1
公开(公告)日：2019-05-16
申请号：US15922922
申请日：2018-03-16
Applicant: NXP B.V.
Inventor： Dongyong Zhu , Feng Cong , FuChun Zhan
IPC: H03K17/082 , H03K5/24 , H02H9/04
Abstract: Gate-protection circuitry protects a transistor, such as a MOSFET, from large gate-to-source voltage differentials that can permanently damage the transistor's gate-oxide layer. A source-voltage detector selectively enables the gate-protection circuitry based on a source voltage of the transistor. The gate-protection circuit is implemented without any Zener diodes. The transistor may be a load switch that is selectively controlled to apply a supply voltage to a load.
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公开(公告)号：US20220385179A1
公开(公告)日：2022-12-01
申请号：US17443972
申请日：2021-07-29
Applicant: NXP B.V.
Inventor： Dongyong Zhu , Bo Cai , XinDong Duan , Feng Cong , Jian Qing
IPC: H02M3/07 , H03K17/16 , H03K17/0812 , H02M1/08 , H02M3/158
Abstract: The disclosure relates to a switched capacitor converter with gate driving circuits for limiting currents provided by switching field effect transistors. Embodiments disclosed include a switched capacitor converter (100), SCC, comprising a plurality of gate driver circuits (101a-d, 200, 300) arranged to provide a gate voltage signal to a respective power FET (102a-d) in response to a respective input switching signal (sw1_in, sw2_in, sw3_in, sw4_in, IN), wherein each gate driver circuit (101a-d, 200, 300) comprises a first gate driver module (206) and a second gate driver module (207), the gate driver circuit (101a-d, 200, 300) configured to operate in: a first mode in which the first gate driver module (206) provides the gate voltage signal to a respective power FET (102a-d, 205) in response to an input switching signal (IN) at an input (203) of the first gate driver module (206) causing the gate voltage signal to switch between first and second voltage rails (201, 202) by operation of first and second switches (208, 209) connected between the pair of voltage rails (201, 202); and a second mode in which, in response to enabling of a current limit switching signal (climit_en), the first gate driver module disables switching of one of the first and second switches (208, 209) and the second gate driver module (207) operates to limit a current provided to the respective power FET (102a-d, 205).
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公开(公告)号：US11165364B2
公开(公告)日：2021-11-02
申请号：US16283845
申请日：2019-02-25
Applicant: NXP B.V.
Inventor： Fuchun Zhan , Tinghua Yun , Jian Qing , Chao Chen , Li Zhang , Feng Cong
Abstract: A synchronous rectifier converts an AC input into a DC output. The synchronous rectifier has four switches controlled by four switch control modules. Each switch is connected between a different AC component and either the DC output or ground. Each switch control module has digitally assisted “switch on” circuitry that detects “on” bounces in the corresponding AC component to control when to turn on the corresponding switch and digitally assisted “switch off” circuitry that detects “off” bounces in the AC component to control when to turn off the corresponding switch. The “switch on” circuitry has a digitally assisted comparator to detect threshold crossings in the AC component, and the “switch off” circuitry has a digitally assisted programmable delay cell to turn off the switch for a predetermined duration following each detected threshold crossing.
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公开(公告)号：US20220375923A1
公开(公告)日：2022-11-24
申请号：US17374214
申请日：2021-07-13
Applicant: NXP B.V.
Inventor： Guido Wouter Willem Quax , Dongyong Zhu , Feng Cong , Tingting Pan
IPC: H01L27/02
Abstract: An integrated circuit includes two N wells from two different devices in close proximity to each other with each N well biased by two different terminals. The N wells are at least partially surrounded by P type regions that are biased by a terminal. The integrated circuit includes conductivity reduction features that increase the resistivity of current paths to a P type regions of one device on a side closest the other device. The integrated circuit includes two conductive tie biasing structures each located directly over an N type region of the substrate and directly over a P type region of the substrate. The two conductive tie biasing structures are not electrically connected to each other and are not electrically coupled to each other by a conductive biasing structure.
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