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公开(公告)号：US20180292511A1
公开(公告)日：2018-10-11
申请号：US15917070
申请日：2018-03-09
Applicant: NXP B.V.
Inventor： Matthis Bouchayer , Cristian Pavao Moreira , Dominique Delbecq , Pierre Savary
Abstract: A radar device (100) is described that includes at least one transceiver (205) configured to support frequency modulated continuous wave (FMCW); a digital controller (262); and a temperature sensor system comprising a plurality of temperature sensors (222, 232, 242) coupled to various circuits (220, 230, 240) in the at least one transceiver (205). The digital controller (262) of the radar device (100) is configured to monitor a temperature of the various circuits (220, 230, 240) by polling temperature values of the plurality of temperature sensors (222, 232, 242).
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公开(公告)号：US10816643B2
公开(公告)日：2020-10-27
申请号：US15917070
申请日：2018-03-09
Applicant: NXP B.V.
Inventor： Matthis Bouchayer , Cristian Pavao Moreira , Dominique Delbecq , Pierre Savary
Abstract: A radar device (100) is described that includes at least one transceiver (205) configured to support frequency modulated continuous wave (FMCW); a digital controller (262); and a temperature sensor system comprising a plurality of temperature sensors (222, 232, 242) coupled to various circuits (220, 230, 240) in the at least one transceiver (205). The digital controller (262) of the radar device (100) is configured to monitor a temperature of the various circuits (220, 230, 240) by polling temperature values of the plurality of temperature sensors (222, 232, 242).
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公开(公告)号：US20240134647A1
公开(公告)日：2024-04-25
申请号：US18483064
申请日：2023-10-09
Applicant: NXP B.V.
Inventor： Paul Wielage , Ayoub Rifai , Dominique Delbecq
IPC: G06F9/30
CPC classification number: G06F9/30145 , G06F9/30032 , G06F9/30098
Abstract: A dynamic element matching system including sequential register groups, decode circuitry, and pointer control circuitry. Each register group includes at least two registers. The decode circuitry controls a state of each register group based on a level of a digital input signal, a relative position with respect to a begin pointer and an end pointer, and a corresponding one of multiple pseudo random probability values. The pointer control circuitry cyclically advances the end pointer among the register groups causing decode circuitry to add one or more register groups and enable a register within each added register group in response to the level of the digital input signal increasing, and also cyclically advances the begin pointer among the register groups causing the decode circuitry to remove one or more register groups and disable a register within each removed register group in response to the level of the digital input signal decreasing.
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