公开(公告)号：US09543288B2

公开(公告)日：2017-01-10

申请号：US14672601

申请日：2015-03-30

Applicant: NXP B.V.

Inventor： Joan Wichard Strijker ,  Inesz Marycka Emmerik-Weijland

IPC: H01L23/62 ,  H01L27/02 ,  H01L29/866 ,  H05K1/02 ,  H02H9/04 ,  H01L29/87 ,  H01L21/8238

CPC classification number: H01L27/0248 ,  H01L21/823878 ,  H01L27/0255 ,  H01L29/866 ,  H01L29/87 ,  H02H9/046 ,  H05K1/0259

Abstract: The invention relates to a semiconductor isolation structure. More particularly, the present invention relates to a semiconductor isolation structure suitable for providing high voltage isolation. Embodiments disclosed include a semiconductor structure (10) comprising: a first semiconductor region (R1), a second semiconductor region (R2) within the first semiconductor region (R1), and a voltage isolator (11) separating the first and second semiconductor regions (R1, R2), the voltage isolator (11) comprising: a nested series of insulating regions (T1, T2) around the perimeter of the second semiconductor region (R2), an intermediate semiconductor region (I1, I2) between each adjacent pair of nested insulating regions (T1, T2), and a voltage control device (12) comprising a conducting element (D1-D3) connected to at least one intermediate semiconductor region (I1, I2) in parallel with the at least one insulating region (T1, T2), so as to control a voltage across the at least one insulating region (T1, T2).

Abstract translation: 本发明涉及半导体隔离结构。 更具体地，本发明涉及适于提供高电压隔离的半导体隔离结构。 所公开的实施例包括半导体结构（10），包括：第一半导体区域（R1），第一半导体区域（R1）内的第二半导体区域（R2）和分离第一和第二半导体区域的电压隔离器（11） R1，R2），所述电压隔离器（11）包括：围绕所述第二半导体区域（R2）的周边的嵌套系列绝缘区域（T1，T2）;在每个相邻的一对 嵌套绝缘区域（T1，T2）和电压控制装置（12），其包括与至少一个中间半导体区域（I1，I2）连接的导电元件（D1-D3），所述中间半导体区域与所述至少一个绝缘区域 ，T2），以便控制所述至少一个绝缘区域（T1，T2）两端的电压。

公开(公告)号：US20150294965A1

公开(公告)日：2015-10-15

申请号：US14672601

申请日：2015-03-30

Applicant: NXP B.V.

Inventor： Joan Wichard Strijker ,  Inesz Marycka Emmerik-Weijland

IPC: H01L27/02 ,  H01L29/866 ,  H01L29/06 ,  H01L21/762

CPC classification number: H01L27/0248 ,  H01L21/823878 ,  H01L27/0255 ,  H01L29/866 ,  H01L29/87 ,  H02H9/046 ,  H05K1/0259

Abstract: The invention relates to a semiconductor isolation structure. More particularly, the present invention relates to a semiconductor isolation structure suitable for providing high voltage isolation. Embodiments disclosed include a semiconductor structure (10) comprising: a first semiconductor region (R1), a second semiconductor region (R2) within the first semiconductor region (R1), and a voltage isolator (11) separating the first and second semiconductor regions (R1, R2), the voltage isolator (11) comprising: a nested series of insulating regions (T1, T2) around the perimeter of the second semiconductor region (R2), an intermediate semiconductor region (I1, I2) between each adjacent pair of nested insulating regions (T1, T2), and a voltage control device (12) comprising a conducting element (D1-D3) connected to at least one intermediate semiconductor region (I1, I2) in parallel with the at least one insulating region (T1, T2), so as to control a voltage across the at least one insulating region (T1, T2).

Abstract translation: 本发明涉及半导体隔离结构。 更具体地，本发明涉及适于提供高电压隔离的半导体隔离结构。 所公开的实施例包括半导体结构（10），包括：第一半导体区域（R1），第一半导体区域（R1）内的第二半导体区域（R2）和分离第一和第二半导体区域的电压隔离器（11） R1，R2），所述电压隔离器（11）包括：围绕所述第二半导体区域（R2）的周边的嵌套系列绝缘区域（T1，T2）;在每个相邻的一对 嵌套绝缘区域（T1，T2）和电压控制装置（12），其包括与至少一个中间半导体区域（I1，I2）连接的导电元件（D1-D3），所述中间半导体区域与所述至少一个绝缘区域 ，T2），以便控制所述至少一个绝缘区域（T1，T2）两端的电压。