公开(公告)号：US20190235345A1

公开(公告)日：2019-08-01

申请号：US15768893

申请日：2015-10-27

Applicant: Nan Qi ,  Cheung Li

Inventor： Nan Qi ,  Cheung Li

IPC: G02F1/21 ,  H03K5/135

CPC classification number: G02F1/21 ,  G02F2001/212 ,  H03K5/135 ,  H03K2005/00052 ,  H03M9/00 ,  H04B10/5055 ,  H04B10/516

Abstract: In example implementations, an apparatus includes a serializer, a re-timing buffer coupled to the serializer, and a plurality of segments coupled to the re-timing buffer. The plurality of segments may be used for controlling a timing of an electrical signal. Each one of the plurality of segments may include a segment serializer, a timing control coupled to the segment serializer and a driver coupled to the timing control. In addition, a phase clock may be coupled to the segment serializer and the timing control of each one of the plurality of segments.