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公开(公告)号:USD410013S
公开(公告)日:1999-05-18
申请号:US87403
申请日:1998-05-01
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公开(公告)号:USD411211S
公开(公告)日:1999-06-22
申请号:US87379
申请日:1998-05-01
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公开(公告)号:USD410473S
公开(公告)日:1999-06-01
申请号:US82937
申请日:1998-01-30
申请人: Naoto Higuchi , Aya Sawai , Hideyuki Takasago
设计人: Naoto Higuchi , Aya Sawai , Hideyuki Takasago
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公开(公告)号:USD563316S1
公开(公告)日:2008-03-04
申请号:US29274255
申请日:2007-04-10
申请人: Naoto Higuchi
设计人: Naoto Higuchi
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公开(公告)号:USD502915S1
公开(公告)日:2005-03-15
申请号:US29202791
申请日:2004-04-06
申请人: Naoto Higuchi , Michihiro Arisato
设计人: Naoto Higuchi , Michihiro Arisato
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公开(公告)号:US07683402B2
公开(公告)日:2010-03-23
申请号:US11858173
申请日:2007-09-20
申请人: Shinji Fujii , Kouichirou Inoue , Naoto Higuchi , Taisei Suzuki
发明人: Shinji Fujii , Kouichirou Inoue , Naoto Higuchi , Taisei Suzuki
IPC分类号: H01L29/41 , H01L29/423
CPC分类号: H01L27/088 , H01L27/0207 , H01L27/0705
摘要: Semiconductor devices whose current characteristics can be prevented from varying even if a phase shift mask is used for patterning gate electrodes of MISFETs, and a manufacturing method thereof are disclosed. According to one aspect of the present invention, there is provided a semiconductor device comprising a first transistor including a first gate electrode provided above a semiconductor substrate, and a first source and a first drain provided in the semiconductor substrate, a second transistor arranged to be adjacent to the first transistor, and including a second gate electrode provided above the semiconductor substrate in parallel with the first gate electrode, and a second source and a second drain provided in the semiconductor substrate, and a third gate electrode provided between the first transistor and the second transistor and in parallel with the first and second gate electrodes.
摘要翻译: 公开了即使使用相移掩模来构图MISFET的栅电极的电流特性也能够防止其变化的半导体器件及其制造方法。 根据本发明的一个方面,提供了一种半导体器件,包括:第一晶体管,包括设置在半导体衬底上的第一栅电极,以及设置在半导体衬底中的第一源极和第一漏极;第二晶体管,被布置为 并且包括设置在所述半导体衬底上的与所述第一栅电极并联的第二栅电极,以及设置在所述半导体衬底中的第二源极和第二漏极,以及设置在所述第一晶体管和所述第一晶体管之间的第三栅电极, 第二晶体管并且与第一和第二栅电极并联。
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公开(公告)号:USD563317S1
公开(公告)日:2008-03-04
申请号:US29274338
申请日:2007-04-18
申请人: Naoto Higuchi
设计人: Naoto Higuchi
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公开(公告)号:USD502914S1
公开(公告)日:2005-03-15
申请号:US29202790
申请日:2004-04-06
申请人: Naoto Higuchi , Michihiro Arisato
设计人: Naoto Higuchi , Michihiro Arisato
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公开(公告)号:USD569795S1
公开(公告)日:2008-05-27
申请号:US29274260
申请日:2007-04-10
申请人: Naoto Higuchi
设计人: Naoto Higuchi
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公开(公告)号:US20080073728A1
公开(公告)日:2008-03-27
申请号:US11858173
申请日:2007-09-20
申请人: Shinji Fujii , Kouichirou Inoue , Naoto Higuchi , Taisei Suzuki
发明人: Shinji Fujii , Kouichirou Inoue , Naoto Higuchi , Taisei Suzuki
IPC分类号: H01L27/088 , H01L21/8234
CPC分类号: H01L27/088 , H01L27/0207 , H01L27/0705
摘要: Semiconductor devices whose current characteristics can be prevented from varying even if a phase shift mask is used for patterning gate electrodes of MISFETs, and a manufacturing method thereof are disclosed. According to one aspect of the present invention, there is provided a semiconductor device comprising a first transistor including a first gate electrode provided above a semiconductor substrate, and a first source and a first drain provided in the semiconductor substrate, a second transistor arranged to be adjacent to the first transistor, and including a second gate electrode provided above the semiconductor substrate in parallel with the first gate electrode, and a second source and a second drain provided in the semiconductor substrate, and a third gate electrode provided between the first transistor and the second transistor and in parallel with the first and second gate electrodes.
摘要翻译: 公开了即使使用相移掩模来构图MISFET的栅电极的电流特性也能够防止其变化的半导体器件及其制造方法。 根据本发明的一个方面,提供了一种半导体器件,包括:第一晶体管,包括设置在半导体衬底上的第一栅电极,以及设置在半导体衬底中的第一源极和第一漏极;第二晶体管,被布置为 并且包括设置在所述半导体衬底上的与所述第一栅电极并联的第二栅电极,以及设置在所述半导体衬底中的第二源极和第二漏极,以及设置在所述第一晶体管和所述第一晶体管之间的第三栅电极, 第二晶体管并且与第一和第二栅电极并联。
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