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    Method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks
    4.
    发明授权
    Method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks 有权
    用于使用分配和并行访问单元控制块使逻辑设备重叠输入/输出请求的方法

    公开(公告)号：US06665739B2

    公开(公告)日：2003-12-16

    申请号：US09731245

    申请日：2000-12-06

    申请人： Natan Vishlitzky ,  Douglas E. LeCrone ,  Izhar Sharon ,  Daniel P. Murphy ,  William R. Fairchild ,  Hana Moreshet ,  Martin Farley ,  Elizabeth E. Patapoutian

    发明人： Natan Vishlitzky ,  Douglas E. LeCrone ,  Izhar Sharon ,  Daniel P. Murphy ,  William R. Fairchild ,  Hana Moreshet ,  Martin Farley ,  Elizabeth E. Patapoutian

    IPC分类号： G06F1314

    CPC分类号： G06F3/0659 ,  G06F3/0611 ,  G06F3/0683 ,  G06F3/0689

    摘要： A method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks. Each I/O request interrupts an operating system to assign a base and related unit control block to the input/output requests. In addition a parallel access control block is associated with each unit control block for a logical volume and a parallel access main control block is established with a logical volume through which each of the base and related unit control block can be identified. An input/output request to a logical device interrupts the operating system to assign one of the base and one of the assigned unit control blocks to the input/output requests after which control transfers back to the operating system. At a disk storage facility, the input/output request is located in a table with other input/output requests and corresponding parameters. The disk array storage facility tests the parameters for each new input/output request to determine which of a plurality of control functions will be performed.

    摘要翻译： 一种用于使用分配和并行访问单元控制块使逻辑设备重叠输入/输出请求的方法。 每个I / O请求中断操作系统以将基本和相关单元控制块分配给输入/输出请求。 此外，并行访问控制块与逻辑卷的每个单元控制块相关联，并且与逻辑卷建立并行访问主控制块，通过该逻辑卷可以识别每个基本单元控制块和相关单元控制块。 对逻辑设备的输入/输出请求中断操作系统以将基站和分配的单元控制块中的一个分配给输入/输出请求，之后控制转移回操作系统。 在磁盘存储设备中，输入/输出请求位于具有其他输入/输出请求和相应参数的表中。 磁盘阵列存储设备测试每个新的输入/输出请求的参数，以确定将执行多个控制功能中的哪一个。

    Lock mechanism for shared resources having associated data structure stored in common memory include a lock portion and a reserve portion
    5.
    发明授权
    Lock mechanism for shared resources having associated data structure stored in common memory include a lock portion and a reserve portion 失效
    具有存储在公共存储器中的相关联的数据结构的共享资源的锁定机构包括锁定部分和预留部分

    公开(公告)号：US6105085A

    公开(公告)日：2000-08-15

    申请号：US998538

    申请日：1997-12-26

    申请人： Martin Farley

    发明人： Martin Farley

    IPC分类号： G06F9/46 ,  G06F3/00

    CPC分类号： G06F9/52

    摘要： A shared resource lock mechanism is provided which enables processors in a multi-processor environment which each share common resources to obtain locks on those resources. The lock mechanism also includes a reserve feature which provides a mechanism for a processor to maintain a lock on a resource for several input/output cycles. The lock mechanism combines the lock feature and the reserve feature in a single structure. This combination allows a processor to manipulate both the lock data and reserve data in a single transaction. Thus, in transactions requiring manipulation of both the lock and reserve elements, overhead is significantly reduced. In addition a unification of software routines which manipulate the lock and reserve data is achieved.

    摘要翻译： 提供了一种共享资源锁定机制，其使多处理器环境中的处理器能够共享共享资源以获得这些资源上的锁定。 锁定机构还包括预留特征，其为处理器提供用于在多个输入/输出周期中维护对资源的锁定的机制。 锁定机构将锁定功能和预留功能组合在一个单一的结构中。 该组合允许处理器在单个事务中操纵锁定数据和保留数据。 因此，在需要操纵锁和储备元件的交易中，开销显着降低。 此外，实现了操纵锁定和保留数据的软件程序的统一。

    Device level busy arrangement for mass storage subsystem including a plurality of devices
    6.
    发明授权
    Device level busy arrangement for mass storage subsystem including a plurality of devices 失效
    包括多个设备的大容量存储子系统的设备级繁忙布置

    公开(公告)号：US6101588A

    公开(公告)日：2000-08-08

    申请号：US937897

    申请日：1997-09-25

    申请人： Martin Farley

    发明人： Martin Farley

    IPC分类号： G06F9/46 ,  G06F12/08 ,  G06F17/30

    CPC分类号： G06F9/52 ,  G06F12/0866 ,  G06F12/084 ,  G06F2212/312

    摘要： A mass storage subsystem is used with a digital data processing system, the digital data processing system also including at least one host computer for generating access requests. The mass storage subsystem includes a data storage subsystem, a cache memory and a host adapter. The data storage subsystem includes at least one data storage device, the data storage device including a plurality of logical data store, each for storing a plurality of data items. Each data storage device is associated with a respective device lock used regulate access thereto. The cache memory includes a plurality of cache slots each caching data items from respective logical data stores. Each cache slot is associated with a slot lock for use in regulating access thereto. The host adapter receives access requests from the host computer, and is responsive to each access request to initially determine whether it holds the device lock associated with the data storage device containing the data item to be accessed in response to the respective access request. The host adapter, in response to a negative determination, determines whether the logical data store containing the data item to be accessed is said at least one cache slot and, if so, uses the slot lock associated therewith to control access thereby to the data item to be accessed.

    摘要翻译： 大容量存储子系统与数字数据处理系统一起使用，数字数据处理系统还包括用于生成访问请求的至少一个主计算机。 大容量存储子系统包括数据存储子系统，高速缓冲存储器和主机适配器。 数据存储子系统包括至少一个数据存储设备，数据存储设备包括多个逻辑数据存储器，每个用于存储多个数据项。 每个数据存储设备与用于调节对其的访问的相应设备锁相关联。 高速缓存存储器包括多个高速缓存时隙，每个高速缓冲存储器高速缓存来自相应逻辑数据存储 每个高速缓存槽与用于调节对其的访问的槽锁相关联。 主机适配器从主计算机接收访问请求，并响应于每个访问请求，以响应于相应的访问请求来初始确定其是否保存与包含要访问的数据项的数据存储设备相关联的设备锁定。 主机适配器响应于否定确定，确定包含要访问的数据项的逻辑数据存储是否表示至少一个高速缓存时隙，如果是，则使用与其相关联的时隙锁来控制数据项的访问 被访问。