Backplane clock synchronization
    1.
    发明授权
    Backplane clock synchronization 有权
    背板时钟同步

    公开(公告)号:US09310832B2

    公开(公告)日:2016-04-12

    申请号:US13664139

    申请日:2012-10-30

    CPC classification number: G06F1/12

    Abstract: Techniques and systems for synchronizing a clock via a backplane. An apparatus includes a backplane, a clock coupled to or included in the backplane, a synchronization interface, and at least one processing element coupled to the clock via the backplane and coupled to or including the synchronization interface. The at least one processing element may be configured to compare first time information received from the clock via the backplane with second time information received from the synchronization interface. The second time information may be associated with an external clock. The at least one processing element may determine adjustment information based on the comparison and synchronize the clock with an external clock using the adjustment information, via the backplane. The apparatus may be a PXIe chassis. The clock output may be sent to modules plugged into the backplane in order to synchronize them with an external chassis clock, for example.

    Abstract translation: 通过背板同步时钟的技术和系统。 一种装置包括背板,耦合到或包括在背板中的时钟,同步接口以及经由背板耦合到时钟并且耦合到或包括同步接口的至少一个处理元件。 至少一个处理元件可以被配置为将从时钟经由背板接收的第一时间信息与从同步接口接收的第二时间信息进行比较。 第二时间信息可以与外部时钟相关联。 所述至少一个处理元件可以基于比较来确定调整信息,并且经由背板使用调整信息将时钟与外部时钟同步。 该设备可能是PXIe机箱。 例如,时钟输出可以发送到插入背板的模块,以便与外部机箱时钟同步。

    Backplane Clock Synchronization
    2.
    发明申请
    Backplane Clock Synchronization 有权
    背板时钟同步

    公开(公告)号:US20140122915A1

    公开(公告)日:2014-05-01

    申请号:US13664139

    申请日:2012-10-30

    CPC classification number: G06F1/12

    Abstract: Techniques and systems for synchronizing a clock via a backplane. An apparatus includes a backplane, a clock coupled to or included in the backplane, a synchronization interface, and at least one processing element coupled to the clock via the backplane and coupled to or including the synchronization interface. The at least one processing element may be configured to compare first time information received from the clock via the backplane with second time information received from the synchronization interface. The second time information may be associated with an external clock. The at least one processing element may determine adjustment information based on the comparison and synchronize the clock with an external clock using the adjustment information, via the backplane. The apparatus may be a PXIe chassis. The clock output may be sent to modules plugged into the backplane in order to synchronize them with an external chassis clock, for example.

    Abstract translation: 通过背板同步时钟的技术和系统。 一种装置包括背板,耦合到或包括在背板中的时钟,同步接口以及经由背板耦合到时钟并且耦合到或包括同步接口的至少一个处理元件。 至少一个处理元件可以被配置为将从时钟经由背板接收的第一时间信息与从同步接口接收的第二时间信息进行比较。 第二次信息可以与外部时钟相关联。 所述至少一个处理元件可以基于比较来确定调整信息,并且经由背板使用调整信息将时钟与外部时钟同步。 该设备可能是PXIe机箱。 例如,时钟输出可以发送到插入背板的模块,以便与外部机箱时钟同步。

    System and Method for Synchronizing a Master Clock Between Networks
    3.
    发明申请
    System and Method for Synchronizing a Master Clock Between Networks 审中-公开
    在网络之间同步主时钟的系统和方法

    公开(公告)号:US20150103848A1

    公开(公告)日:2015-04-16

    申请号:US14054443

    申请日:2013-10-15

    CPC classification number: H04J3/0661 H04J3/0697 H04L12/403

    Abstract: Systems and methods for synchronizing clocks across networks using a time-sensitive (TS) network interface controller (NIC). The TS NIC may include a functional unit, a port, a clock, a plurality of input/output queue pairs, and a time stamp unit (TSU). The functional unit may be configured to generate synchronization packets usable by an NTS network timekeeper of a respective NTS network to synchronize the NTS network to the master clock, including using the TSU to generate time stamps for the synchronization packets in accordance with the clock synchronized to the master clock and communicate with the respective NTS network via the port using the corresponding input/output queue pair, including sending the synchronization packets to the NTS network timekeeper of the respective NTS network.

    Abstract translation: 使用时间敏感(TS)网络接口控制器(NIC)在网络上同步时钟的系统和方法。 TS NIC可以包括功能单元,端口,时钟,多个输入/输出队列对和时间戳单元(TSU)。 功能单元可以被配置为生成由相应NTS网络的NTS网络计时器可用的同步分组,以使NTS网络与主时钟同步,包括使用TSU根据与时钟同步的时钟同步生成用于同步分组的时间戳 主时钟,并使用相应的输入/输出队列对通过端口与相应的NTS网络通信,包括将同步分组发送到相应NTS网络的NTS网络计时器。

    System and Method for Synchronizing a Master Clock Between Networks
    4.
    发明申请
    System and Method for Synchronizing a Master Clock Between Networks 审中-公开
    在网络之间同步主时钟的系统和方法

    公开(公告)号:US20150103849A1

    公开(公告)日:2015-04-16

    申请号:US14512145

    申请日:2014-10-10

    CPC classification number: H04J3/0661 H04L12/4645 H04L47/562 H04L69/28

    Abstract: System and methods for synchronizing real time networks. Systems may include a first device located on a first real time network that may include a functional unit, a port, and a plurality of output queues configured for segregation of network packets based on a mapping of one or more additional real time networks to respective output queues. For each of the one or more additional real time networks, synchronization packets may be generated based on a master clock. The packets may be usable by a network timekeeper of the additional real time network to synchronize the additional real time network to the master clock. The synchronization packets may be stored in a respective output queue based on the mapping and may be sent to the network timekeeper of the additional real time network via the port.

    Abstract translation: 用于同步实时网络的系统和方法。 系统可以包括位于第一实时网络上的第一设备,其可以包括功能单元,端口和配置为基于一个或多个附加实时网络到相应输出的映射来分离网络分组的多个输出队列 队列 对于一个或多个附加实时网络中的每一个,可以基于主时钟生成同步分组。 分组可以由附加实时网络的网络计时器使用,以将附加实时网络同步到主时钟。 同步分组可以基于映射存储在相应的输出队列中,并且可以经由端口被发送到附加实时网络的网络计时器。

    Counter Based Clock Distribution in a Distributed System With Multiple Clock Domains Over a Switched Fabric
    5.
    发明申请
    Counter Based Clock Distribution in a Distributed System With Multiple Clock Domains Over a Switched Fabric 审中-公开
    分布式系统中基于计数器的时钟分配,在交换结构中具有多个时钟域

    公开(公告)号:US20140019794A1

    公开(公告)日:2014-01-16

    申请号:US13953412

    申请日:2013-07-29

    CPC classification number: G06F1/12 G06F1/10 G06F1/14 G06F2213/0038

    Abstract: System and method for synchronizing devices. A device reads a first counter coupled to and associated with a master clock and a second counter coupled to and associated with the device, where the device is one of one or more devices coupled to the master clock and each other via a switched fabric, where each device includes a respective clock, and is coupled to and associated with a respective second counter. Each of the first counter and the second counters is accessible by each of the one or more devices. The device determines a difference between the device's associated second counter and the first counter, and determines and stores a time reference for the device relative to the master clock based on the determined difference, where the time reference is useable to timestamp events or synchronize future events.

    Abstract translation: 用于同步设备的系统和方法。 设备读取耦合到主时钟并与其相关联的第一计数器,以及与设备耦合并与设备相关联的第二计数器,其中该设备是通过交换结构耦合到主时钟和彼此之间的一个或多个设备之一,其中 每个设备包括相应的时钟,并且耦合到相应的第二计数器并与之相关联。 第一计数器和第二计数器中的每一个可由一个或多个设备中的每一个访问。 设备确定设备相关联的第二计数器和第一计数器之间的差异,并且基于所确定的差异来确定并存储设备相对于主时钟的时间参考,其中时间参考可用于时间戳事件或同步未来事件 。

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