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公开(公告)号：US08173758B2
公开(公告)日：2012-05-08
申请号：US13073134
申请日：2011-03-28
摘要： A polysiloxane represented by the formula (1) or (2): where R, R1, R2, m and n are defined in the specification.
摘要翻译： 由式（1）或（2）表示的聚硅氧烷：其中R，R 1，R 2，m和n在说明书中定义。
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公开(公告)号：US20080171846A1
公开(公告)日：2008-07-17
申请号：US12000615
申请日：2007-12-14
摘要： A polysiloxane represented by the formula (1) or (2): where R, R1, R2, m and n are defined in the specification.
摘要翻译： 由式（1）或（2）表示的聚硅氧烷：其中R，R 1，R 2，m和n在本说明书中定义。
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公开(公告)号：US08367792B2
公开(公告)日：2013-02-05
申请号：US13455442
申请日：2012-04-25
IPC分类号： C08G77/16
摘要： A polysiloxane represented by the formula (1) or (2): where R, R1, R2, m and n are defined in the specification.
摘要翻译： 由式（1）或（2）表示的聚硅氧烷：其中R，R 1，R 2，m和n在说明书中定义。
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公开(公告)号：US20120208973A1
公开(公告)日：2012-08-16
申请号：US13455442
申请日：2012-04-25
摘要： A polysiloxane represented by the formula (1) or (2): where R, R1, R2, m and n are defined in the specification.
摘要翻译： 由式（1）或（2）表示的聚硅氧烷：其中R，R 1，R 2，m和n在说明书中定义。
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公开(公告)号：US20110178313A1
公开(公告)日：2011-07-21
申请号：US13073134
申请日：2011-03-28
IPC分类号： C07F7/21
摘要： A polysiloxane represented by the formula (1) or (2): where R, R1, R2, m and n are defined in the specification.
摘要翻译： 由式（1）或（2）表示的聚硅氧烷：其中R，R 1，R 2，m和n在说明书中定义。
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公开(公告)号：US07939617B2
公开(公告)日：2011-05-10
申请号：US12000615
申请日：2007-12-14
摘要： A polysiloxane represented by the formula (1) or (2): where R, R1, R2, m and n are defined in the specification.
摘要翻译： 由式（1）或（2）表示的聚硅氧烷：其中R，R 1，R 2，m和n在说明书中定义。
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公开(公告)号：US08400058B2
公开(公告)日：2013-03-19
申请号：US12394087
申请日：2009-02-27
申请人： Takashi Kawasaki , Yasuhito Yamaryo , Atsuo Ohtomi
发明人： Takashi Kawasaki , Yasuhito Yamaryo , Atsuo Ohtomi
IPC分类号： H01J17/49
摘要： A PDP to improve a discharge delay includes X and Y electrodes, a dielectric layer covering the X and Y electrodes, and a protective layer covering the dielectric layer. The protective layer includes an MgO film stacked on a surface of the dielectric layer, and a plurality of MgO crystal particles attached on the MgO film. In addition, a covering ratio of a surface of the MgO film is lower than or equal to 10%, and the plurality of MgO crystal particles are arranged so that orientations of surfaces opposing to the discharge space are aligned. Further, the plurality of MgO crystal particles have a cubic form.
摘要翻译： 改善放电延迟的PDP包括X和Y电极，覆盖X和Y电极的电介质层和覆盖电介质层的保护层。 保护层包括层叠在电介质层的表面上的MgO膜和附着在MgO膜上的多个MgO结晶粒子。 此外，MgO膜的表面的覆盖率低于或等于10％，并且排列多个MgO晶体颗粒，使得与放电空间相对的表面的取向对准。 此外，多个MgO晶体颗粒具有立方体形状。
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公开(公告)号：US20100244687A1
公开(公告)日：2010-09-30
申请号：US12738076
申请日：2008-02-19
申请人： Yasuhito Yamaryo , Yoshiyuki Kaneko , Hiroyuki Tachihara , Takahiro Ueno , Takashi Kawasaki , Atsuo Ohtomi
发明人： Yasuhito Yamaryo , Yoshiyuki Kaneko , Hiroyuki Tachihara , Takahiro Ueno , Takashi Kawasaki , Atsuo Ohtomi
摘要： It is an object of the present invention to provide a plasma display panel with an improved panel structure for improving a discharge time-lag and, more particularly, to provide a plasma display panel with a new protective film structure, the plasma display panel having uniformed panel properties suitable for mass production with a high yield.A PDP of the present invention which provides a pair of substrate assemblies opposed to each other sandwiching discharge spaces formed to seal a discharge gas therein, wherein one of the pair of substrate assemblies comprises: display electrodes arranged on a substrate; a dielectric layer for covering the display electrodes; and a protective layer for covering the dielectric layer, the protective layer is configured so that a plurality of MgO single crystals are adhered to an MgO film in such a manner that crystal orientations of the plurality of MgO single crystals are aligned in one direction, and a value which is three times of a standard deviation of coverage factors of the MgO single crystals on the MgO film, divided by a mean value of the coverage factors is 20% or less.
摘要翻译： 本发明的目的是提供一种具有改进的面板结构的等离子体显示面板，用于改善放电时间延迟，更具体地说，提供具有新的保护膜结构的等离子体显示面板，等离子体显示面板具有均匀的 面板适用于大批量生产，产量高。 本发明的PDP提供了一对相对的夹持放电空间的衬底组件，用于将放电气体密封在其中，其中一对衬底组件中的一个包括：布置在衬底上的显示电极; 用于覆盖所述显示电极的介电层; 以及用于覆盖电介质层的保护层，保护层被构造成使得多个MgO单晶以使得多个MgO单晶的晶体取向沿一个方向排列的方式粘附到MgO膜上，并且 MgO膜上的MgO单晶的覆盖系数的标准偏差的三倍除以覆盖系数的平均值的值为20％以下。
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公开(公告)号：US08040064B2
公开(公告)日：2011-10-18
申请号：US12738076
申请日：2008-02-19
申请人： Yasuhito Yamaryo , Yoshiyuki Kaneko , Hiroyuki Tachihara , Takahiro Ueno , Takashi Kawasaki , Atsuo Ohtomi
发明人： Yasuhito Yamaryo , Yoshiyuki Kaneko , Hiroyuki Tachihara , Takahiro Ueno , Takashi Kawasaki , Atsuo Ohtomi
IPC分类号： H01J1/62
摘要： It is an object of the present invention to provide a plasma display panel with an improved panel structure for improving a discharge time-lag and, more particularly, to provide a plasma display panel with a new protective film structure, the plasma display panel having uniformed panel properties suitable for mass production with a high yield.A PDP of the present invention which provides a pair of substrate assemblies opposed to each other sandwiching discharge spaces formed to seal a discharge gas therein, wherein one of the pair of substrate assemblies comprises: display electrodes arranged on a substrate; a dielectric layer for covering the display electrodes; and a protective layer for covering the dielectric layer, the protective layer is configured so that a plurality of MgO single crystals are adhered to an MgO film in such a manner that crystal orientations of the plurality of MgO single crystals are aligned in one direction, and a value which is three times of a standard deviation of coverage factors of the MgO single crystals on the MgO film, divided by a mean value of the coverage factors is 20% or less.
摘要翻译： 本发明的目的是提供一种具有改进的面板结构的等离子体显示面板，用于改善放电时间延迟，更具体地说，提供具有新的保护膜结构的等离子体显示面板，等离子体显示面板具有均匀的 面板适用于大批量生产，产量高。 本发明的PDP提供了一对相对的夹持放电空间的衬底组件，用于将放电气体密封在其中，其中一对衬底组件中的一个包括：布置在衬底上的显示电极; 用于覆盖所述显示电极的介电层; 以及用于覆盖电介质层的保护层，保护层被构造成使得多个MgO单晶以使得多个MgO单晶的晶体取向沿一个方向排列的方式粘附到MgO膜上，并且 MgO膜上的MgO单晶的覆盖系数的标准偏差的三倍除以覆盖系数的平均值的值为20％以下。
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公开(公告)号：US20100213839A1
公开(公告)日：2010-08-26
申请号：US12672572
申请日：2007-08-10
IPC分类号： H01J17/49
摘要： To provide a plasma display panel of improving a discharge time-lag.A plasma display panel of the present invention is characterized in that it comprises a pair of substrate assemblies opposed to each other sandwiching discharge spaces formed to seal a discharge gas therein, wherein one of the pair of substrate assemblies comprises: display electrodes arranged on a substrate; a dielectric layer for covering the display electrodes; and a protective layer for covering the dielectric layer, and the protective layer is configured so that a plurality of MgO single crystals are adhered to an MgO film in such a manner that crystal orientations of the plurality of MgO single crystals are aligned in one direction.
摘要翻译： 提供一种提高放电时间延迟的等离子体显示面板。 本发明的等离子体显示面板的特征在于，它包括一对基板组件，彼此相对的夹持放电空间被形成以将放电气体密封在其中，其中一对基板组件中的一个包括：布置在基板上的显示电极 ; 用于覆盖所述显示电极的介电层; 以及用于覆盖电介质层的保护层，并且保护层被构造成使得多个MgO单晶以使得多个MgO单晶的晶体取向沿一个方向排列的方式粘附到MgO膜。
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