-
公开(公告)号:US20200348710A1
公开(公告)日:2020-11-05
申请号:US16864807
申请日:2020-05-01
发明人: Mikko LINTONEN , Jarmo VÄÄNÄNEN , Janne JUUSOLA
IPC分类号: G05F3/24 , G01R19/165
摘要: A voltage monitoring circuit portion is arranged to monitor a negative supply voltage (Vneg) and comprises a negative voltage generator arranged to generate the negative supply voltage (Vneg) and to output the negative supply voltage (Vneg) at an output terminal. A capacitor is arranged so that a first capacitor plate is connected to the output terminal of the generator and to a reference node via a potential divider. The potential divider is arranged to produce a monitor voltage (Vmonitor) between the resistors, where the reference node is supplied with a positive predetermined reference voltage (Vref). A comparator compares the monitor voltage (Vmonitor) to a threshold voltage (Vref_low) and to produce an output signal having a first value when the monitor voltage (Vmonitor) is below the threshold voltage (Vref_low) and having a second value otherwise. The negative voltage generator is enabled only when the output signal has its second value.