Speech detection circuit
    1.
    发明授权
    Speech detection circuit 失效
    语音检测电路

    公开(公告)号:US5371800A

    公开(公告)日:1994-12-06

    申请号:US777184

    申请日:1991-10-16

    IPC分类号: H04B1/04 G10L11/02 G10L5/00

    CPC分类号: G10L25/78

    摘要: A speech detection circuit includes an amplifier for amplifying an input audio signal and having a variable gain, a rectifying circuit for rectifying an output signal of the amplifier, a comparator for comparing an output signal level of the rectifying circuit with a reference level, and a control circuit for outputting a control signal based on an output signal of the comparator. The control circuit outputs a control signal which indicates a power save mode after a predetermined time elapses from a time when the output signal level of the rectifying circuit becomes less than or equal to the reference level, and outputs a control signal which indicates a normal mode immediately when the output signal level of the rectifying circuit becomes greater than the reference level. The amplifier receives the control signal output from the control circuit and reduces its gain when the control signal indicates the power save mode.

    摘要翻译: 语音检测电路包括用于放大输入音频信号并具有可变增益的放大器,用于对放大器的输出信号进行整流的整流电路,将整流电路的输出信号电平与参考电平进行比较的比较器,以及 控制电路,用于基于比较器的输出信号输出控制信号。 控制电路从整流电路的输出信号电平变为小于等于参考电平的时刻起经过了规定时间后,输出表示省电模式的控制信号,并输出表示正常模式的控制信号 立即当整流电路的输出信号电平变得大于基准电平时。 当控制信号指示省电模式时,放大器接收从控制电路输出的控制信号并降低其增益。

    Amplifier provided at output stage of intermediate frequency amplifying
circuit of mobile communication system
    2.
    发明授权
    Amplifier provided at output stage of intermediate frequency amplifying circuit of mobile communication system 失效
    放大器提供在移动通信系统中频放大电路的输出级

    公开(公告)号:US5339460A

    公开(公告)日:1994-08-16

    申请号:US959779

    申请日:1992-10-13

    IPC分类号: H04B1/16 H04B1/18

    CPC分类号: H04W52/0283 Y02B60/50

    摘要: In a mobile communication system wherein only the circuits necessary for detecting a call send or a call receive operation are activated intermittently to reduce power consumption from a battery during a stand-by period, and all of the circuits are continuously activated by being supplied with power during a call operation, an amplifier is provided at an output stage of an intermediate frequency amplifying circuit in the system. The amplifier has an output transistor whose output terminal is connected to a load circuit via a capacitor, a circuit for supplying an operating direct current to the output transistor and a semiconductor switch provided in the current supply circuit. When the semiconductor switch is cut off, a leakage current flows through the output transistor, so that an average direct current voltage level is generated at the output terminal of the transistor. Accordingly, when the semiconductor switch is turned ON, the average direct current voltage level at the load circuit is obtained at high speed, and the rise time characteristics of the load circuit are improved.

    摘要翻译: 在移动通信系统中,其中只有检测呼叫发送或呼叫接收操作所需的电路被间歇地激活以在待机期间减少电池的功耗,并且所有电路通过被供电而被连续地激活 在通话操作期间,放大器设置在系统中的中频放大电路的输出级。 放大器具有输出晶体管,其输出端通过电容器连接到负载电路,用于向输出晶体管提供工作直流电的电路和设置在电流供应电路中的半导体开关。 当半导体开关被切断时,泄漏电流流过输出晶体管,使得在晶体管的输出端产生平均直流电压电平。 因此,当半导体开关导通时,在高速度下获得负载电路的平均直流电压电平,提高负载电路的上升时间特性。

    Frequency synthesizer having quick frequency pull in and phase lock-in
    3.
    发明授权
    Frequency synthesizer having quick frequency pull in and phase lock-in 失效
    频率合成器具有快速的频率拉入和锁相

    公开(公告)号:US5389899A

    公开(公告)日:1995-02-14

    申请号:US50151

    申请日:1993-04-23

    摘要: A frequency synthesizer, including a phase-locked loop. The phase locked loop effects phase comparison between a comparison signal based on an output from a voltage-controlled oscillator and a reference signal based on an output from a reference oscillator. The resultant phase difference signal is submitted to a loop filter whose output serves as a control signal of the voltage-controlled oscillator. The frequency synthesizer includes a preset circuit for switching the output of the voltage-controlled oscillator by quickly charging or discharging a capacitor of the loop filter and a modifying circuit for modifying the time constant of the loop filter. The phase-locked loop is brought to phase lock at a high speed by decreasing the time constant of the loop filter when switching the output frequency.

    摘要翻译: PCT No.PCT / JP92 / 01086 Sec。 371日期:1993年4月23日 102(e)日期1993年4月23日PCT提交1992年8月27日PCT公布。 出版物WO93 / 05578 日期:1993年3月18日。一种频率合成器,包括锁相环。 锁相环基于来自压控振荡器的输出的比较信号和基于参考振荡器的输出的参考信号进行相位比较。 所得到的相位差信号被提交给一个环路滤波器,其输出用作压控振荡器的控制信号。 频率合成器包括用于通过快速充电或放电环路滤波器的电容器来切换压控振荡器的输出的预设电路和用于修改环路滤波器的时间常数的修正电路。 通过在切换输出频率时减小环路滤波器的时间常数,使锁相环以高速进行锁相。