摘要:
A speech detection circuit includes an amplifier for amplifying an input audio signal and having a variable gain, a rectifying circuit for rectifying an output signal of the amplifier, a comparator for comparing an output signal level of the rectifying circuit with a reference level, and a control circuit for outputting a control signal based on an output signal of the comparator. The control circuit outputs a control signal which indicates a power save mode after a predetermined time elapses from a time when the output signal level of the rectifying circuit becomes less than or equal to the reference level, and outputs a control signal which indicates a normal mode immediately when the output signal level of the rectifying circuit becomes greater than the reference level. The amplifier receives the control signal output from the control circuit and reduces its gain when the control signal indicates the power save mode.
摘要:
In a mobile communication system wherein only the circuits necessary for detecting a call send or a call receive operation are activated intermittently to reduce power consumption from a battery during a stand-by period, and all of the circuits are continuously activated by being supplied with power during a call operation, an amplifier is provided at an output stage of an intermediate frequency amplifying circuit in the system. The amplifier has an output transistor whose output terminal is connected to a load circuit via a capacitor, a circuit for supplying an operating direct current to the output transistor and a semiconductor switch provided in the current supply circuit. When the semiconductor switch is cut off, a leakage current flows through the output transistor, so that an average direct current voltage level is generated at the output terminal of the transistor. Accordingly, when the semiconductor switch is turned ON, the average direct current voltage level at the load circuit is obtained at high speed, and the rise time characteristics of the load circuit are improved.
摘要:
A frequency synthesizer, including a phase-locked loop. The phase locked loop effects phase comparison between a comparison signal based on an output from a voltage-controlled oscillator and a reference signal based on an output from a reference oscillator. The resultant phase difference signal is submitted to a loop filter whose output serves as a control signal of the voltage-controlled oscillator. The frequency synthesizer includes a preset circuit for switching the output of the voltage-controlled oscillator by quickly charging or discharging a capacitor of the loop filter and a modifying circuit for modifying the time constant of the loop filter. The phase-locked loop is brought to phase lock at a high speed by decreasing the time constant of the loop filter when switching the output frequency.