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公开(公告)号:US11151944B2
公开(公告)日:2021-10-19
申请号:US16802578
申请日:2020-02-27
Applicant: Novatek Microelectronics Corp.
Inventor: Yung-Yu Hsieh , Tse-Yuan Chen , Jen-Hao Liao , Chun-Hsiao Teng , Chia-Wei Chang
IPC: G09G3/3266 , G09G3/3291
Abstract: A driving circuit, a display apparatus and a driving method thereof are provided. The display panel is divided into a plurality of regions including a first region having a rectangular form and a second region having a free form. The driving circuit generates a plurality of control clocks having a first duty cycle during a first period and a second duty cycle different from the first duty cycle during a second period, or having a first phase shift during the first period and a second phase shift different from the first phase shift during the second period, or having a first driving capability during the first period and a second driving capability different from the first driving capability during the second period. Wherein, the control clocks are configured to be transmitted to a gate driving circuit disposed on the display panel for generating a first plurality of scan signals controlling the first region and a second plurality of scan signals controlling the second region according to the control clocks, so as to reduce a luminance difference between the first region and the second region.
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公开(公告)号:US20200273409A1
公开(公告)日:2020-08-27
申请号:US16802578
申请日:2020-02-27
Applicant: Novatek Microelectronics Corp.
Inventor: Yung-Yu Hsieh , Tse-Yuan Chen , Jen-Hao Liao , Chun-Hsiao Teng , Chia-Wei Chang
IPC: G09G3/3266 , G09G3/3291
Abstract: A driving circuit, a display apparatus and a driving method thereof are provided. The display panel is divided into a plurality of regions including a first region having a rectangular form and a second region having a free form. The driving circuit generates a plurality of control clocks having a first duty cycle during a first period and a second duty cycle different from the first duty cycle during a second period, or having a first phase shift during the first period and a second phase shift different from the first phase shift during the second period, or having a first driving capability during the first period and a second driving capability different from the first driving capability during the second period. Wherein, the control clocks are configured to be transmitted to a gate driving circuit disposed on the display panel for generating a first plurality of scan signals controlling the first region and a second plurality of scan signals controlling the second region according to the control clocks, so as to reduce a luminance difference between the first region and the second region.
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