POWER SUPPLY CONTROL CIRCUIT
    1.
    发明申请

    公开(公告)号:US20170085095A1

    公开(公告)日:2017-03-23

    申请号:US15371352

    申请日:2016-12-07

    Abstract: A power supply control circuit includes a drive voltage generation circuit configured to generate a plurality of drive voltages by using a plurality of power supply voltages that are supplied from outside, a sequencer configured to stop, when supply of the plurality of power supply voltages is stopped in a predetermined order, generation of the plurality of drive voltages according to priority ranks set in advance, and a power supply monitor circuit configured to perform, when supply of one power supply voltage, among the plurality of power supply voltages, is stopped in an order different from the predetermined order but supply of other power supply voltages is continued, an operation for simultaneously stopping generation of drive voltages that are set at higher priority ranks than a priority rank for stopping generation of a drive voltage that uses the one power supply voltage.

    PROCESSING APPARATUS AND PROCESSING SYSTEM

    公开(公告)号:US20170288684A1

    公开(公告)日:2017-10-05

    申请号:US15624931

    申请日:2017-06-16

    Inventor: Tomoharu OGIHARA

    CPC classification number: H03L7/095 G06F7/57 H03K19/17716

    Abstract: A processing apparatus includes an FPGA unit connected to an oscillator configured to output a first clock, wherein the FPGA unit includes: a PLL circuit configured to output a second clock with a frequency of a predetermined ratio with respect to a frequency of the first clock and configured to output a lock signal (detection signal); an input and output monitoring unit configured to detect a ratio between the frequencies of the first clock and the second clock, compare the detected ratio with the predetermined ratio, and output an abnormal signal when the detected ratio does not coincide with the predetermined ratio; and an initialization unit configured to output a reset signal when the input and output monitoring unit outputs the abnormal signal and configured to output the reset signal when the PLL circuit outputs the lock signal.

    IMAGING DEVICE AND ENDOSCOPE
    3.
    发明申请

    公开(公告)号:US20190117053A1

    公开(公告)日:2019-04-25

    申请号:US16220113

    申请日:2018-12-14

    Abstract: An imaging device includes: a pixel unit including a plurality of pixels that are arranged in a two-dimensional matrix, each pixel being configured to generate an imaging signal corresponding to an amount of light received and output the image signal; an A/D converter configured to conduct A/D conversion on the imaging signal generated by the pixel unit or on a drive power for driving the pixel unit, to generate a digital signal and output the digital signal to an external unit; a switch that is capable of switching a connection of the A/D converter to the pixel unit or a transmission line for transmitting the drive power; and a first controller configured to control the switch to connect the A/D converter to the transmission line in predetermined timing to cause the A/D converter to output a voltage value of the drive power to the external unit.

    ENDOSCOPE APPARATUS
    4.
    发明申请
    ENDOSCOPE APPARATUS 审中-公开
    内窥镜装置

    公开(公告)号:US20160262596A1

    公开(公告)日:2016-09-15

    申请号:US15162812

    申请日:2016-05-24

    Abstract: An endoscope apparatus includes image sensors, a power supply unit, a failure detection unit, and a controller. The power supply unit supplies power independently to the image sensors. The failure detection unit detects a failure in each of the image sensors. The controller controls the power supply unit to stop power supply to an image sensor in which a failure is detected at the failure detection unit.

    Abstract translation: 内窥镜装置包括图像传感器,电源单元,故障检测单元和控制器。 电源单元为图像传感器独立供电。 故障检测单元检测每个图像传感器中的故障。 控制器控制电源单元停止向故障检测单元检测到故障的图像传感器供电。

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