公开(公告)号：US09768619B2

公开(公告)日：2017-09-19

申请号：US15371352

申请日：2016-12-07

Applicant: OLYMPUS CORPORATION

Inventor： Keisuke Ogawa ,  Fumiyuki Okawa ,  Tomoharu Ogihara

IPC: H02J4/00 ,  A61B1/00 ,  A61B1/04 ,  G02B23/24 ,  H02J1/00 ,  A61B1/045 ,  A61B1/06

CPC classification number: H02J4/00 ,  A61B1/00006 ,  A61B1/00009 ,  A61B1/00027 ,  A61B1/00045 ,  A61B1/04 ,  A61B1/045 ,  A61B1/06 ,  G02B23/24 ,  H02J1/00 ,  H02J2001/008

Abstract: A power supply control circuit includes a drive voltage generation circuit configured to generate a plurality of drive voltages by using a plurality of power supply voltages that are supplied from outside, a sequencer configured to stop, when supply of the plurality of power supply voltages is stopped in a predetermined order, generation of the plurality of drive voltages according to priority ranks set in advance, and a power supply monitor circuit configured to perform, when supply of one power supply voltage, among the plurality of power supply voltages, is stopped in an order different from the predetermined order but supply of other power supply voltages is continued, an operation for simultaneously stopping generation of drive voltages that are set at higher priority ranks than a priority rank for stopping generation of a drive voltage that uses the one power supply voltage.

公开(公告)号：US10980405B2

公开(公告)日：2021-04-20

申请号：US16220113

申请日：2018-12-14

Applicant: OLYMPUS CORPORATION

Inventor： Tomoharu Ogihara ,  Fumiyuki Okawa ,  Keisuke Tsutsui ,  Keisuke Ogawa

IPC: A61B1/04 ,  A62B1/04 ,  A61B1/045 ,  G02B23/24 ,  A61B1/05 ,  H04N5/225 ,  H04N5/335 ,  A61B1/00

Abstract: An imaging device includes: a pixel unit including a plurality of pixels that are arranged in a two-dimensional matrix, each pixel being configured to generate an imaging signal corresponding to an amount of light received and output the image signal; an A/D converter configured to conduct A/D conversion on the imaging signal generated by the pixel unit or on a drive power for driving the pixel unit, to generate a digital signal and output the digital signal to an external unit; a switch that is capable of switching a connection of the A/D converter to the pixel unit or a transmission line for transmitting the drive power; and a first controller configured to control the switch to connect the A/D converter to the transmission line in predetermined timing to cause the A/D converter to output a voltage value of the drive power to the external unit.

公开(公告)号：US20200077871A1

公开(公告)日：2020-03-12

申请号：US16682107

申请日：2019-11-13

Applicant: Olympus Corporation

Inventor： Tomoharu Ogihara ,  Keisuke Tsutsui

IPC: A61B1/00 ,  A61B1/045

Abstract: An endoscopic system comprises an image capturing device. The image capturing device captures an image of an examinee and generates a captured image signal with respect to the examinee. A control device is connected to the endoscope. A first controller is disposed in the endoscope and having a first sender/receiver communicating with the control device during a predetermined period when the endoscope is connected to the control device so as to send a plurality of parameters for driving the image capturing device to the control device. A second controller is disposed in the control device and having a second sender/receiver receiving the parameters sent from the first controller during the predetermined period when the endoscope is connected to the control device. An output value controller is disposed in the control device and setting predetermined output values relative to the control device required to drive the image capturing device.

公开(公告)号：US10548461B2

公开(公告)日：2020-02-04

申请号：US15162812

申请日：2016-05-24

Applicant: OLYMPUS CORPORATION

Inventor： Tomoharu Ogihara ,  Fumiyuki Okawa ,  Keisuke Tsutsui ,  Keisuke Ogawa

IPC: A61B1/00 ,  A61B1/04

Abstract: An endoscope apparatus includes image sensors, a power supply unit, a failure detection unit, and a controller. The power supply unit supplies power independently to the image sensors. The failure detection unit detects a failure in each of the image sensors. The controller controls the power supply unit to stop power supply to an image sensor in which a failure is detected at the failure detection unit.

公开(公告)号：US09960775B2

公开(公告)日：2018-05-01

申请号：US15624931

申请日：2017-06-16

Applicant: OLYMPUS CORPORATION

Inventor： Tomoharu Ogihara

IPC: G06F7/38 ,  H03L7/095 ,  H03K19/177 ,  G06F7/57

CPC classification number: H03L7/095 ,  G06F7/57 ,  H03K19/17716

Abstract: A processing apparatus includes an FPGA unit connected to an oscillator configured to output a first clock, wherein the FPGA unit includes: a PLL circuit configured to output a second clock with a frequency of a predetermined ratio with respect to a frequency of the first clock and configured to output a lock signal (detection signal); an input and output monitoring unit configured to detect a ratio between the frequencies of the first clock and the second clock, compare the detected ratio with the predetermined ratio, and output an abnormal signal when the detected ratio does not coincide with the predetermined ratio; and an initialization unit configured to output a reset signal when the input and output monitoring unit outputs the abnormal signal and configured to output the reset signal when the PLL circuit outputs the lock signal.