公开(公告)号：US10254679B2

公开(公告)日：2019-04-09

申请号：US15628296

申请日：2017-06-20

Applicant: Oki Data Corporation

Inventor： Kazuya Yamamoto ,  Keisuke Iwahashi ,  Keisuke Watanabe ,  Takashi Kobayashi ,  Keitaro Ishida ,  Yasushi Yamawaki

IPC: G06F21/85 ,  G03G15/08 ,  G06F11/30 ,  G03G15/00 ,  G03G21/18

Abstract: A memory control device includes a memory control part that controls memory through an interface part in accordance with a predetermined communication regulation, an illegal access detection part that detects an illegal access to the memory according to an access state from the memory control part to the memory and a signal state of the interface part, and a signal control part that switches the signal state of the interface part from a write-allowed state, in which the interface part is able to be written, to a write-inhibited state, in which the interface part is protected from being rewritten, when the illegal access is detected by the illegal access detection part.

公开(公告)号：US11126383B2

公开(公告)日：2021-09-21

申请号：US16816155

申请日：2020-03-11

Applicant: Oki Data Corporation

Inventor： Syuhei Mitani ,  Keisuke Watanabe

IPC: G06F3/12

Abstract: One or more embodiments may relate to an information processing device connectable to a network and including interfaces in which network identification numbers can be set. The information processing device may include: a network connection determination processor that determines whether or not first and second interfaces of the interfaces are connected on a same network; an identification number setting processor that sets, when the first and second interfaces are connected on the same network, a network identification number of one of the first and second interfaces in the other interface; and a stop-startup processor that stops the one of the first and second interfaces.