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公开(公告)号:US20200175937A1
公开(公告)日:2020-06-04
申请号:US16783883
申请日:2020-02-06
Applicant: Panasonic Liquid Crystal Display Co., Ltd.
Inventor: Yoshihiro IMAJO , Kazunori INOUE , Kenta ENDO
Abstract: A drive circuit includes an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines. The plurality of gate lines include first to sixth gate lines sequentially disposed in a scanning direction. A first transistor is put into an on state to electrically connect the first gate line and the third gate line, a second transistor is put into the on state to electrically connect the second gate line and the fourth gate line, the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line, and the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line, after the output circuit outputs the gate-on voltage to the first to fourth gate line.
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公开(公告)号:US20180182341A1
公开(公告)日:2018-06-28
申请号:US15901386
申请日:2018-02-21
Applicant: Panasonic Liquid Crystal Display Co., Ltd.
Inventor: Yoshihiro IMAJO , Kazunori INOUE , Kenta ENDO
IPC: G09G3/36
Abstract: A drive circuit includes an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines. The plurality of gate lines include first to sixth gate lines sequentially disposed in a scanning direction. A first transistor is put into an on state to electrically connect the first gate line and the third gate line, a second transistor is put into the on state to electrically connect the second gate line and the fourth gate line, the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line, and the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line, after the output circuit outputs the gate-on voltage to the first to fourth gate line.
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