公开(公告)号：US20170269129A1

公开(公告)日：2017-09-21

申请号：US15512182

申请日：2015-09-22

Applicant: Panduit Corp.

Inventor： Masud BOLOURI-SARANSAR ,  James E. FABISZAK ,  Richard A. RAGO

IPC: G01R19/155

CPC classification number: G01R19/155 ,  G01R15/12 ,  G01R31/026 ,  G01R31/2829

Abstract: A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.