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公开(公告)号：US08259786B2
公开(公告)日：2012-09-04
申请号：US12368431
申请日：2009-02-10
IPC分类号： H03H7/30
CPC分类号： H04L27/2647 , H04L25/022 , H04L25/03159
摘要： A channel smoothing filter with a finite impulse response (FIR) has a controller which reads parallel sample data out of an FFT memory in such a manner as to generate an even function, the sample data applied to a preamble equalizer accompanied by a preamble sign and zero, the preamble outputs coupled to three filter processors, each filter processor having four filter engines whose outputs are summed, the channel smoothing filter generating an a register output, the register input coupled to a summer which has as inputs: the first filter processor shifted by four, the second filter processor shifted by two, the third filter processor, and the register output. Coefficients for an edge filter and a central filter are provided in Zero Sign Shift (ZSS) format, and by selection of coefficients using a canonical signed digit (CSD) algorithm, no multipliers are required for the channel smoothing FIR filter.
摘要翻译： 具有有限脉冲响应（FIR）的信道平滑滤波器具有控制器，其以这样的方式从FFT存储器中读取并行取样数据，以产生偶函数，该样本数据应用于伴有前置码符号的前同步码均衡器， 零，所述前导码输出耦合到三个滤波器处理器，每个滤波器处理器具有四个滤波器引擎，其输出相加，所述信道平滑滤波器产生寄存器输出，耦合到具有作为输入的加法器的寄存器输入：第一滤波器处理器被移位 由四个，第二个滤波器处理器移位两个，第三个滤波器处理器和寄存器输出。 边缘滤波器和中央滤波器的系数以零符号移位（ZSS）格式提供，并且通过使用规范有符号数字（CSD）算法选择系数，通道平滑FIR滤波器不需要乘法器。
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公开(公告)号：US20100202504A1
公开(公告)日：2010-08-12
申请号：US12368431
申请日：2009-02-10
IPC分类号： H03K5/159
CPC分类号： H04L27/2647 , H04L25/022 , H04L25/03159
摘要： A channel smoothing filter with a finite impulse response (FIR) has a controller which reads parallel sample data out of an FFT memory in such a manner as to generate an even function, the sample data applied to a preamble equalizer accompanied by a preamble sign and zero, the preamble outputs coupled to three filter processors, each filter processor having four filter engines whose outputs are summed, the channel smoothing filter generating an a register output, the register input coupled to a summer which has as inputs: the first filter processor shifted by four, the second filter processor shifted by two, the third filter processor, and the register output. Coefficients for an edge filter and a central filter are provided in Zero Sign Shift (ZSS) format, and by selection of coefficients using a canonical signed digit (CSD) algorithm, no multipliers are required for the channel smoothing FIR filter.
摘要翻译： 具有有限脉冲响应（FIR）的信道平滑滤波器具有控制器，其以这样的方式从FFT存储器中读取并行取样数据，以产生偶函数，该样本数据应用于伴有前置码符号的前同步码均衡器， 零，所述前导码输出耦合到三个滤波器处理器，每个滤波器处理器具有四个滤波器引擎，其输出相加，所述信道平滑滤波器产生寄存器输出，耦合到具有作为输入的加法器的寄存器输入：第一滤波器处理器被移位 由四个，第二个滤波器处理器移位两个，第三个滤波器处理器和寄存器输出。 边缘滤波器和中央滤波器的系数以零符号移位（ZSS）格式提供，并且通过使用规范有符号数字（CSD）算法选择系数，通道平滑FIR滤波器不需要乘法器。
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