Printing plate and method to prepare a printing plate
    2.
    发明授权
    Printing plate and method to prepare a printing plate 失效
    印版和方法准备印版

    公开(公告)号:US06359056B1

    公开(公告)日:2002-03-19

    申请号:US09492644

    申请日:2000-01-27

    IPC分类号: C08L2504

    CPC分类号: B41C1/1066

    摘要: A printing plate is prepared by the process comprising: (a) providing a substrate; and (b) applying by ink jetting to the substrate a fluid composition comprising an acidic polymeric compound and a second compound comprising a pyridyl group in non-aqueous solvent, providing a printing plate that is ready-to-use on a press without having to develop it. The printing plate of this invention is capable of extended press run length and advantageously avoids the costly and time-consuming need of chemical development.

    摘要翻译: 制备印刷版的方法包括:(a)提供基材; 和(b)通过喷墨向基材施加包含酸性聚合物的流体组合物和在非水溶剂中包含吡啶基的第二化合物,提供在压机上即用的印刷板,而不必 发展它 本发明的印版能够延长压印长度,有利地避免了昂贵且耗时的化学发展需求。

    Orthogonal frequency hopping using skip zones

    公开(公告)号:US06434184B1

    公开(公告)日:2002-08-13

    申请号:US09223680

    申请日:1998-12-30

    申请人: Mark J. Lindsey

    发明人: Mark J. Lindsey

    IPC分类号: H04B1500

    摘要: The present invention is a method and apparatus for providing orthogonal frequency hopping for users in a communication system. The users have user bandwidths allocated on a frequency band. A jitter space is provided with a jitter bandwidth on the allocated frequency band. If at least one of the user bandwidths is larger than the jitter space, a skip zone is determined for at least one of the user bandwidths. The skip zone is unoccupied by a starting hop of the user bandwidths when the user bandwidths are shifted in a frequency hopping.

    Reconfigurable, multi-user Viterbi decoder

    公开(公告)号:US5151904A

    公开(公告)日:1992-09-29

    申请号:US590238

    申请日:1990-09-27

    IPC分类号: H03M13/41

    摘要: A decoding system for decoding a digital data stream that has been convolutionally encoded in accordance with a selected constraint length and selected polynomial codes, which system includes a processor, such as a Viterbi decoder, that is reconfigurable so that it can decode encoded digital data streams for a number of different user channels for which data streams have been convolutionally encoded in accordance with respectively different combinations of selected constraint length and selected polynomial codes. The decoding system includes a Viterbi decoder for processing the encoded data stream in accordance with said selected constraint length and in accordance with said selected polynomial codes to decode the encoded data stream; a RAM for storing data of said selected constraint length and data of said selected polynomial codes in accordance with which said data stream was encoded; and a RAM I/O interface circuit responsive to a user channel identification signal for retrieving said selected constraint length data and said selected polynomial code data from the RAM and configuring the Viterbi decoder in accordance with said selected constraint length and said selected polynomial codes. In order to accommodate concurrent multiple user channels, the RAM stores different sets of combinations of constraint length data and polynomial code data corresponding to different user channels, with said different sets being retrievable from the RAM in response to respectively different user channel identification signals. The polynomial code data and constraint length data in the RAM may be changed from time to time in response to software instructions, as user channel requirements change. The Viterbi decoder processes said encoded data stream over a plurality of decoding cycles and produces intermediate decoding results during different decoding cycles; and the RAM I/O interface circuit stores in the RAM said intermediate decoding results produced for each different user channel during the different decoding cycles.