公开(公告)号：US5884053A

公开(公告)日：1999-03-16

申请号：US873347

申请日：1997-06-11

申请人： Paul L. Clouser ,  Richard Allen Kelley ,  Danny Marvin Neal ,  Charles Bertram Perkins, Jr.

发明人： Paul L. Clouser ,  Richard Allen Kelley ,  Danny Marvin Neal ,  Charles Bertram Perkins, Jr.

IPC分类号： G06F13/40 ,  G06F13/00

CPC分类号： G06F13/4072

摘要： An enhanced PCI bus architecture utilizing differential signaling is supported by an adapter slot connector providing differential signaling pins and a make-before-break connection between bus conductors and dummy loads for each bus conductor, enabling higher frequency and higher bandwidth operation. The dummy loads simulate the signal load of an adapter inserted into the slot. The PCI bus conductors are automatically disconnected from the dummy loads and connected to the adapter pins when an adapter is inserted into the slot. A balanced load bus is thus provided regardless of whether adapter slots are populated or empty.

摘要翻译： 使用差分信号的增强型PCI总线架构由适配器插槽连接器支持，适配器插槽连接器为每个总线导体提供差分信号引脚和总线导体与虚拟负载之间的断开前连接，实现更高频率和更高带宽操作。 虚拟负载模拟插入插槽中的适配器的信号负载。 当适配器插入插槽时，PCI总线导体将自动从虚拟负载断开并连接到适配器引脚。 因此，无论适配器插槽是填充还是空的，均可提供均衡的负载总线。

公开(公告)号：US07197446B2

公开(公告)日：2007-03-27

申请号：US10711168

申请日：2004-08-30

申请人： Erik Breiland ,  Timothy W. Budell ,  Charles S. Chiu ,  Paul L. Clouser ,  Charles K. Erdelyi ,  Brian P. Welch

发明人： Erik Breiland ,  Timothy W. Budell ,  Charles S. Chiu ,  Paul L. Clouser ,  Charles K. Erdelyi ,  Brian P. Welch

IPC分类号： G06F17/50

CPC分类号： G06F17/5036 ,  G06F2217/78

摘要： The invention relates generally to a method of power supply noise and signal integrity analysis for creating frequency-dependent electrical models particularly related to microelectronic packages. The method discloses creation of equivalent circuits for geometries encountered in a typical chip package, including how to partition the geometry into cells which are less then 1/20 the minimum wavelength (λ) in size, and how to handle signal and power supply vias, signal wires, and power planes. The method also instructs how to assign values to each of the inductors, capacitors, resistors, and transmission lines in each equivalent circuit. The method further provides modeling of only those interactions which occur between adjacent cells.

摘要翻译： 本发明一般涉及一种用于产生与微电子封装特别相关的频率相关的电气模型的电源噪声和信号完整性分析方法。 该方法公开了在典型芯片封装中遇到的几何形状的等效电路的创建，包括如何将几何划分成小于小于最小波长（λ）的1/20的单元，以及如何处理信号和电源通孔， 信号线和电源平面。 该方法还指示如何为每个等效电路中的每个电感器，电容器，电阻器和传输线分配值。 该方法还提供仅在相邻小区之间发生的那些相互作用的建模。